EP2SGX90EF1152I4N Altera, EP2SGX90EF1152I4N Datasheet - Page 120

Stratix II GX

EP2SGX90EF1152I4N

Manufacturer Part Number
EP2SGX90EF1152I4N
Description
Stratix II GX
Manufacturer
Altera
Datasheet

Specifications of EP2SGX90EF1152I4N

Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant

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I/O Structure
Figure 2–76. Stratix II GX IOE Structure
2–112
Stratix II GX Device Handbook, Volume 1
Logic Array
Output B
Output A
Input B
Input A
OE
Output Register
Output Register
The IOEs are located in I/O blocks around the periphery of the
Stratix II GX device. There are up to four IOEs per row I/O block and four
IOEs per column I/O block. The row I/O blocks drive row, column, or
direct link interconnects. The column I/O blocks drive column
interconnects.
D
D
Q
Q
CLK
OE Register
OE Register
D
D
Q
Q
Input Register
Input Register
D
D
Q
Q
Input Latch
D
ENA
Altera Corporation
Q
October 2007

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