EP2SGX90EF1152I4N Altera, EP2SGX90EF1152I4N Datasheet - Page 209

• Manufacturer Part Number: EP2SGX90EF1152I4N
• Description: Stratix II GX
• Manufacturer: Altera

Specifications of EP2SGX90EF1152I4N

• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 90960
• # I/os (max): 558
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 90960
• Ram Bits: 4520448
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / Rohs Status: Compliant

Altera Corporation
June 2009
Functional
XAUI
PIPE
GIGE
SONET/
SDH
(OIF)
CEI
PHY
CPRI
(4)
Serial
RapidIO
SDI
Table 4–22. PCS Latency (Part 1 of 3)
Mode
1.228 Gbps
2.456 Gbps
3.125 Gbps
1.25 Gbps,
Configuration
614 Mbps,
×1, ×4, ×8
×1, ×4, ×8
2.5 Gbps,
channel
channel
channel
channel
HD, 3G
OC-12
OC-48
OC-96
16-bit
10-bit
20-bit
width
width
width
width
8-bit
HD
Aligner
2-2.5
2-2.5
3-3.5
2-2.5
2-2.5
Word
4-5
4-5
6-7
4-5
4-5
2.5
2.5
5
Deskew
2-2.5
FIFO
-
-
-
-
-
-
-
-
-
-
-
-
Note (1)
5.5-6.5
5.5-6.5
Matcher
11-13
11-13
Rate
(3)
-
-
-
-
-
-
-
-
-
Decoder
8B/10B
0.5
0.5
0.5
0.5
0.5
0.5
0.5
1
1
1
1
1
1
Receiver PCS Latency
Receiver
Machine
State
1
-
-
-
-
-
-
-
-
-
-
-
-
Stratix II GX Device Handbook, Volume 1
serializer
Byte
De-
1
1
1
1
1
1
1
1
1
1
1
1
1
DC and Switching Characteristics
Order
Byte
1-2
1
1
1
1
1
1
1
1
1
1
1
1
Receiver
Phase
Comp
FIFO
1-2
2-3
2-3
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1
Receiver
PIPE
1
1
-
-
-
-
-
-
-
-
-
-
-
4–39
14-17
21-25
13-16
19-23
10-12
8-10
9-10
Sum
7-9
6-7
6-7
8-9
6-7
6-7
(2)