EP2SGX90EF1152I4N Altera, EP2SGX90EF1152I4N Datasheet - Page 310
EP2SGX90EF1152I4N
Manufacturer Part Number
EP2SGX90EF1152I4N
Description
Stratix II GX
Manufacturer
Altera
Datasheet
1.EP2SGX90EF1152I4N.pdf
(316 pages)
Specifications of EP2SGX90EF1152I4N
Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2SGX90EF1152I4N
Manufacturer:
ALTERA
Quantity:
535
Part Number:
EP2SGX90EF1152I4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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June 2006, v4.0
Table 4–118. Document Revision History (Part 4 of 5)
Document
Date and
Version
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Updated Table 6–5.
Updated Table 6–6.
Updated all values in Table 6–7.
Added Tables 6–8 and 6–9.
Added Figures 6–1 through 6–4.
Updated Table 6–18.
Updated Tables 6–85 through 6–96.
Added Table 6–80, Stratix II GX Maximum
Output Clock Rate for Dedicated Clock Pins.
Updated Table 6–100.
In “I/O Timing Measurement Methodology”
section, updated Table 6–42.
In “Internal Timing Parameters” section,
updated Tables 6–43 through 6–48.
In “Stratix II GX Clock Timing Parameters”
section, updated Tables 6–50 through 6–65.
In “IOE Programmable Delay” section, updated
Tables 6–67 and 6–68.
In “I/O Delays” section, updated Tables 6–71
through 6–74.
In “Maximum Input & Output Clock Toggle Rate”
section, updated Tables 6–75 through 6–83.
In “DCD Measurement Techniques” section,
updated Tables 6–85 through 6–92.
In “High-Speed I/O Specifications” section,
updated Tables 6–94 through 6–96.
In “External Memory Interface Specifications”
section, updated Table 6–100.
Changes Made
●
●
●
●
Removed rows for V
and V
Updated values for rx, tx, and
refclkb
Removed table containing 1.2-V
PCML I/O information. That
information is in Table 6–7.
Added values to Table 6–100.
Summary of Changes
O C M
in Table 6–6.
from Table 6–5.
I D
, V
O D
, V
I C M
,
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