EP2SGX90EF1152I4N Altera, EP2SGX90EF1152I4N Datasheet - Page 305

Stratix II GX

EP2SGX90EF1152I4N

Manufacturer Part Number
EP2SGX90EF1152I4N
Description
Stratix II GX
Manufacturer
Altera
Datasheet

Specifications of EP2SGX90EF1152I4N

Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant

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Figure 4–14. Stratix II GX JTAG Waveforms.
Captured
Driven
Signal
Signal
to be
to be
TMS
TDO
TCK
TDI
t
JCH
Table 4–117
Stratix II GX devices.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
JPZX
JSZX
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 4–117. Stratix II GX JTAG Timing Parameters and Values
Symbol
t
JCP
t
JSSU
t
JCL
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
shows the JTAG timing parameters and values for
t
JSH
t
t
JPCO
JSCO
t
JPSU
Parameter
t
t
JSXZ
JPH
t
JPXZ
Min Max Unit
30
12
12
4
5
4
5
12
12
12
9
9
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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