EP2SGX90EF1152I4N Altera, EP2SGX90EF1152I4N Datasheet - Page 184

• Manufacturer Part Number: EP2SGX90EF1152I4N
• Description: Stratix II GX
• Manufacturer: Altera

Specifications of EP2SGX90EF1152I4N

• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 90960
• # I/os (max): 558
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 90960
• Ram Bits: 4520448
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / Rohs Status: Compliant

Operating Conditions
4–14
Stratix II GX Device Handbook, Volume 1
V
= 1.5 V
400
600
800
1000
1200
Setting
Table 4–13. Typical Pre-Emphasis (First Post-Tap),
C C H
(mV)
V
OD
TX
24%
1
62%
31%
20%
2
112%
56%
35%
23%
17%
Tables 4–13
Note to
(1)
Note to
(1)
V
V
V
3
Table 4–11. Typical V
Table 4–12. Typical V
V
OD
OD
C C H
C C H
Typical (mV)
Typical (mV)
Applicable to data rates from 600 Mbps to 3.125 Gbps. Specification is for
measurement at the package ball.
Applicable to data rates from 600 Mbps to 3.125 Gbps. Specification is for
measurement at the package ball.
TX = 1.2 V
TX = 1.2 V
184%
Table
Table
86%
53%
36%
25%
4
through
4–11:
4–12:
First Post Tap Pre-Emphasis Level
122%
73%
49%
35%
5
4–18
OD
OD
192
TX Term = 100
210
Note (1)
240
260
168%
96%
64%
45%
Setting, TX Term = 120 Ω
Setting, TX Term = 150 Ω
6
show the typical first post-tap pre-emphasis.
(Part 1 of 2)
230%
123%
79%
56%
384
410
7
V
480
500
OD
Ω
V
Setting (mV)
OD
329%
156%
97%
68%
8
Setting (mV)
576
600
720
730
457%
196%
118%
82%
Note (1)
Note (1)
9
Altera Corporation
237%
141%
95%
768
780
10
960
960
312%
165%
110%
June 2009
11
960
960
387%
200%
125%
12