RFD14N05L Fairchild Semiconductor, RFD14N05L Datasheet - Page 7

MOSFET N-CH 50V 14A I-PAK

RFD14N05L

Manufacturer Part Number
RFD14N05L
Description
MOSFET N-CH 50V 14A I-PAK
Manufacturer
Fairchild Semiconductor
Type
Power MOSFETr
Datasheet

Specifications of RFD14N05L

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
100 mOhm @ 14A, 5V
Drain To Source Voltage (vdss)
50V
Current - Continuous Drain (id) @ 25° C
14A
Vgs(th) (max) @ Id
2V @ 250µA
Gate Charge (qg) @ Vgs
40nC @ 10V
Input Capacitance (ciss) @ Vds
670pF @ 25V
Power - Max
48W
Mounting Type
Through Hole
Package / Case
IPak, TO-251, DPak, VPak (3 straight leads + tab)
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.1 Ohms
Drain-source Breakdown Voltage
50 V
Gate-source Breakdown Voltage
+/- 10 V
Continuous Drain Current
14 A
Power Dissipation
48 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Elements
1
Polarity
N
Channel Mode
Enhancement
Drain-source On-res
0.1Ohm
Drain-source On-volt
50V
Gate-source Voltage (max)
±10V
Output Power (max)
Not RequiredW
Frequency (max)
Not RequiredMHz
Noise Figure
Not RequireddB
Power Gain
Not RequireddB
Drain Efficiency
Not Required%
Operating Temp Range
-55C to 175C
Operating Temperature Classification
Military
Mounting
Through Hole
Pin Count
3 +Tab
Package Type
IPAK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PSPICE Electrical Model
.SUBCKT RFD14N05L 2 1 3 ;
CA 12 8 1.464e-9
CB 15 14 1.64e-9
CIN 6 8 6.17e-10
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 65.35
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 5.68e-9
LSOURCE 3 7 5.35e-9
MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 33.1e-3
RGATE 9 20 5.85
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 14.3e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.485
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/46,7))}
.MODEL DBDMOD D (IS = 2.23e-13 RS = 1.15e-2 TRS1 = 1.64e-3 TRS2 = 7.89e-6 CJO = 6.83e-10 TT = 3.68e-8)
.MODEL DBKMOD D (RS = 3.8e-1 TRS1 = 1.89e-3 TRS2 = 1.13e-5)
.MODEL DPLCAPMOD D (CJO = 25.7e-11 IS = 1e-30 N = 10)
.MODEL MOSMOD NMOS (VTO = 1.935 KP = 18.89 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 7.18e-4 TC2 = 1.53e-6)
.MODEL RDSMOD RES (TC1 = 4.45e-3 TC2 = 2.9e-5)
.MODEL RSCLMOD RES (TC1 = 2.8e-3 TC2 = 6.0e-6)
.MODEL RVTOMOD RES (TC1 = -1.7e-3 TC2 = -2.0e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.55 VOFF= -1.55)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.55 VOFF= -3.55)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.55 VOFF= 2.45)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.45 VOFF= -2.55)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global
Temperature Options; authored by William J. Hepp and C. Frank Wheatley.
©2010 Fairchild Semiconductor Corporation
rev 9/15/94
GATE
1
LGATE RGATE
9
20
12
+
S1A
S1B
EVTO
CA
ESG
18
8
EGS
13
8
10
+
6
8
+
RIN
14
13
6
8
6
RSCL2
13
S2A
S2B
DPLCAP
VTO
15
EDS
CB
CIN
+
16
+
5
8
51
5
5
14
+
MOS1
50
RDRAIN
51
RSCL1
21
ESCL
8
RSOURCE
DBREAK
EBREAK
MOS2
17
11
RFD14N05L, RFD14N05LSM Rev. B2
17
18
+
RBREAK
IT
7
LSOURCE
LDRAIN
DBODY
18
19
+
RVTO
VBAT
3
SOURCE
DRAIN
2

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