PSB21384HV1.3 Infineon Technologies, PSB21384HV1.3 Datasheet - Page 204

• Manufacturer Part Number: PSB21384HV1.3
• Description: Telecom ICs AMuLaw/Speech CODEC w/ ST Transceiver
• Manufacturer: Infineon Technologies

Specifications of PSB21384HV1.3

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data Sheet
7.1.18
Value after reset: F3
CIR0
CODR0
Value of the received Command/Indication code. A C/I-code is loaded in CODR0 only
after being the same in two consecutive IOM-frames and the previous code has been
read from CIR0.
CIC0
A change in the received Command/Indication code has been recognized. This bit is set
only when a new code is detected in two consecutive IOM-frames. It is reset by a read
of CIR0.
CIC1
A change in the received Command/Indication code in IOM-channel 1 has been
recognized. This bit is set when a new code is detected in one IOM-frame. It is reset by
a read of CIR0.
S/G
Indicates the availability of the D-channel on the line interface.
1: Stop
0: Go
BAS
Indicates the state of the TIC-bus:
0: The SCOUT itself occupies the D- and C/I-channel
1: Another device occupies the D- and C/I-channel
Note: The CODR0 bits are updated every time a new C/I-code is detected in two
1000
AR8
consecutive IOM-frames. If several consecutive valid new codes are detected and
CIR0 is not read, only the first and the last C/I code is made available in CIR0 at
the first and second read of that register, respectively.
CIR0 - Command/Indication Receive 0
7
AR10
1001
... C/I Code 0 Receive
... C/I Code 0 Change
... C/I Code 1 Change
... Stop/Go Bit Monitoring
... Bus Access Status
H
CODR0
1010
ARL
1111
DI
194
CIC0
0001
RES
CIC1
Detailed Register Description
0000
TIM
S/G
0
BAS
0010
TM1
PSB 21381/2
PSB 21383/4
2001-03-12
RD (2E
0011
TM2
H
)