FQD1P50TM Fairchild Semiconductor, FQD1P50TM Datasheet

MOSFET P-CH 500V 1.2A DPAK

FQD1P50TM

Manufacturer Part Number
FQD1P50TM
Description
MOSFET P-CH 500V 1.2A DPAK
Manufacturer
Fairchild Semiconductor
Series
QFET™r
Datasheets

Specifications of FQD1P50TM

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
10.5 Ohm @ 600mA, 10V
Drain To Source Voltage (vdss)
500V
Current - Continuous Drain (id) @ 25° C
1.2A
Vgs(th) (max) @ Id
5V @ 250µA
Gate Charge (qg) @ Vgs
14nC @ 10V
Input Capacitance (ciss) @ Vds
350pF @ 25V
Power - Max
2.5W
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©2009 Fairchild Semiconductor Corporation
FQD1P50 / FQU1P50
500V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
Absolute Maximum Ratings
Thermal Characteristics
* When mounted on the minimum pad size recommended (PCB Mount)
V
I
I
V
E
I
E
dv/dt
P
T
T
R
R
R
D
DM
AR
J
L
Symbol
DSS
GSS
AS
AR
D
Symbol
, T
JC
JA
JA
STG
G
Drain-Source Voltage
Drain Current
Drain Current
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
Power Dissipation (T
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
S
D-PAK
FQD Series
D
- Continuous (T
- Continuous (T
- Pulsed
- Derate above 25°C
A
C
= 25°C) *
Parameter
= 25°C)
Parameter
G
T
C
D
C
C
= 25°C unless otherwise noted
= 25°C)
= 100°C)
S
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Features
• -1.2A, -500V, R
• RoHS Compliant
• Low gate charge ( typical 11 nC)
• Low Crss ( typical 6.0 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
I-PAK
FQU Series
FQD1P50 / FQU1P50
Typ
--
--
--
DS(on)
-55 to +150
= 10.5
-0.76
-500
-1.2
-4.8
-1.2
-4.5
300
110
3.8
2.5
0.3
38
30
G
! ! ! !
! ! ! !
@V
Max
3.29
110
50
GS
January 2009
= -10 V
QFET
▶ ▶ ▶ ▶
▶ ▶ ▶ ▶
! ! ! !
! ! ! !
D
S
! ! ! !
! ! ! !
● ●
● ●
● ●
● ●
● ●
● ●
▲ ▲ ▲ ▲
▲ ▲ ▲ ▲
Rev. B3, January 2009
Units
W/°C
Units
°C/W
°C/W
°C/W
V/ns
mJ
mJ
°C
°C
W
W
V
A
A
A
V
A
®

Related parts for FQD1P50TM

FQD1P50TM Summary of contents

Page 1

... Thermal Resistance, Junction-to-Ambient * JA R Thermal Resistance, Junction-to-Ambient JA * When mounted on the minimum pad size recommended (PCB Mount) ©2009 Fairchild Semiconductor Corporation Features • -1.2A, -500V, R • Low gate charge ( typical 11 nC) • Low Crss ( typical 6.0 pF) • Fast switching • 100% avalanche tested • ...

Page 2

... Repetitive Rating : Pulse width limited by maximum junction temperature 138mH -1.2A -50V -1.5A, di/dt 200A Starting DSS, 4. Pulse Test : Pulse width 300 s, Duty cycle 5. Essentially independent of operating temperature ©2009 Fairchild Semiconductor Corporation T = 25°C unless otherwise noted C Test Conditions -250 -250 A, Referenced to 25° -500 -400 125° ...

Page 3

... Drain Current [A] D Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 600 500 400 300 200 100 Drain-Source Voltage [V] DS Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Corporation 0 10 Notes : ※ 1. 250µ s Pulse Test ℃ Figure 2. Transfer Characteristics 0 10 Note : ℃ ...

Page 4

... 150 Single Pulse - Drain-Source Voltage [V] DS Figure 9. Maximum Safe Operating Area ©2009 Fairchild Semiconductor Corporation (Continued) 2.5 2.0 1.5 1.0 Notes : ※ 0 -250 µA D 0.0 100 150 200 -100 o C] Figure 8. On-Resistance Variation 1.2 1.0 100 s 0 0.6 DC 0.4 0.2 0.0 ...

Page 5

... Resistive Switching Test Circuit & Waveforms -10V -10V Unclamped Inductive Switching Test Circuit & Waveforms -10V -10V ©2009 Fairchild Semiconductor Corporation Gate Charge Test Circuit & Waveform Same Type Same Type as DUT as DUT -10V -10V DUT DUT DUT DUT ...

Page 6

... Peak Diode Recovery dv/dt Test Circuit & Waveforms Driver ) ( Driver ) DUT ) ( DUT ) DUT ) ( DUT ) ©2009 Fairchild Semiconductor Corporation + + DUT DUT Driver Driver Compliment of DUT Compliment of DUT (N-Channel) (N-Channel) • dv/dt controlled by R • dv/dt controlled by R • I • I controlled by pulse period ...

Page 7

... Package Dimensions TO-252 (DPAK) (FS PKG Code 36) ©2009 Fairchild Semiconductor Corporation 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: millimeters Part Weight per unit (gram): 0.33 Rev. B3, January 2009 ...

Page 8

... Package Dimensions 6.60 0.20 5.34 0.20 (0.50) (4.34) MAX0.96 0.76 0.10 2.30TYP [2.30 0.20] ©2009 Fairchild Semiconductor Corporation (Continued) I-PAK (0.50) 2.30TYP [2.30 0.20] 2.30 0.20 0.50 0.10 0.50 0.10 Dimensions in Millimeters Rev.B3, January 2009 ...

Page 9

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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