SI3200-G-GS Silicon Laboratories Inc, SI3200-G-GS Datasheet - Page 12

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SI3200-G-GS

Manufacturer Part Number
SI3200-G-GS
Description
SLIC 2-CH 63dB 45mA 3.3V 6-Pin SMD
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3200-G-GS

Package
6SMD
Number Of Channels Per Chip
2
Polarity Reversal
Yes
Longitudinal Balanced
63 dB
Loop Current
45 mA
Minimum Operating Supply Voltage
3.13 V
Typical Operating Supply Voltage
3.3 V
Typical Supply Current
0.11 mA
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V, 5V
Current - Supply
110µA
Power (watts)
941mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Includes
Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 5. AC Characteristics (Continued)
(V
Si3220/25 Si3200/02
12
Parameter
Idle Channel Noise
PSRR from V
PSRR from V
Longitudinal to Metallic/PCM
Balance (forward or reverse)
Metallic/PCM to Longitudinal
Balance
Longitudinal Impedance
Longitudinal Current per Pin
Notes:
DD
1. The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should
2. Analog signal measured as V
3. The quantization errors inherent in the µ/A-law companding process can generate slightly worse gain tracking
4. The digital gain block is a linear multiplier that is programmable from –∞ to +6 dB. The step size in dB varies over the
5. V
6. The level of any unwanted tones within the bandwidth of 0 to 4 kHz does not exceed –55 dBm.
7. The OBIAS and ABIAS registers program the dc bias current through the SLIC in the on-hook transmission and off-
, V
DD1
be –10 dBm0. The output signal magnitude at any other frequency will be smaller than the maximum value specified.
performance in the signal range of 3 to –37 dB for signal frequencies that are integer divisors of the 8 kHz PCM
sampling rate.
complete range. See "3.25. Audio Path Processing" on page 70.
coefficients.
hook active conditions, respectively. This per-pin total current setting should be selected so it can accommodate the
sum of the metallic and longitudinal currents through each of the TIP and RING leads for a given application.
DD1
– V
– V
DD4
DD1
BAT
DD4
=
– V
=
3.13 to 5.25 V, T
6
3.3 V, V
DD4
7
BAT
7
=
TIP
–52 V, no fuse resistors, R
A
= 0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade)
– V
200 Hz to 3.4 kHz at TIP or RING
RING
RX and TX, dc to 3.4 kHz
RX and TX, dc to 3.4 kHz
Psophometric weighted
Longitudinal Performance
C-Message weighted
. Assumes ideal line impedance matching.
Register-dependent
Register-dependent
200 Hz to 3.4 kHz
200 Hz to 3.4 kHz
1 kHz to 3.4 kHz
200 Hz to 1 kHz
Test Condition
Active off-hook
Noise Performance
OBIAS/ABIAS
OBIAS/ABIAS
10 = 12 mA
10 = 12 mA
11 = 16 mA
11 = 16 mA
00 = 4 mA
01 = 8 mA
00 = 4 mA
01 = 8 mA
3 kHz flat
Rev. 1.3
L
=
600 Ω, Z
S
=
600 Ω synthesized using RS register
Min
40
60
58
53
40
Typ
–78
12
70
58
50
25
25
20
10
4
8
8
Max
–75
15
18
dBrnC
dBmP
dBrn
Unit
mA
mA
mA
mA
dB
dB
dB
dB
dB

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