SI3200-G-GS Silicon Laboratories Inc, SI3200-G-GS Datasheet - Page 96

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SI3200-G-GS

Manufacturer Part Number
SI3200-G-GS
Description
SLIC 2-CH 63dB 45mA 3.3V 6-Pin SMD
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3200-G-GS

Package
6SMD
Number Of Channels Per Chip
2
Polarity Reversal
Yes
Longitudinal Balanced
63 dB
Loop Current
45 mA
Minimum Operating Supply Voltage
3.13 V
Typical Operating Supply Voltage
3.3 V
Typical Supply Current
0.11 mA
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V, 5V
Current - Supply
110µA
Power (watts)
941mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Includes
Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Si3220/25 Si3200/02
The interrupt information for channels A and B is a
single bit that indicates that one or more interrupts might
exist on the respective channel. Each of the individual
interrupt flags (see registers 18–20) can be individually
masked by writing the appropriate bit in registers 21–23
to ignore specific interrupts. When using the GCI mode,
the user should verify that each of the desired interrupt
bits are set so the upstream SC channel byte includes
the required interrupt functions.
3.32. System Testing
The Dual ProSLIC devices include a complete suite of
test tools to test the functionality of the line card and
detect fault conditions present on the TIP/RING pair.
Using one of the loopback test modes with the signal
generation and measurement tools eliminates the need
for per-line test relays and centralized test equipment.
3.32.1. Loopback Modes
Three loopback test options are available for the Dual
ProSLIC devices:
96
The codec loopback path encompasses almost
entirely the electronics of both the transmit and
receive paths. The analog signal at the output of the
receive path is fed back to the input of the transmit
path through a feedback path on the analog side of
the audio codec. Both the impedance synthesis and
transhybrid balance functions are disabled in this
mode. (See DLM3 path in Figure 11 on page 25.)
The signal path starts with 8-bit PCM data input to
the receive path and ends with 8-bit PCM data at the
output of the transmit path. The user can bypass the
companding process and interface directly to the 16-
bit data.
A second digital loopback takes the receive path
digital stream and routes it back to the transmit path
via the transhybrid feedback path. (See DLM2 path
through block H in Figure 11.) This mode
characterizes the transhybrid filter response. The
transhybrid block can also be disabled (set to unity
gain) in this mode for diagnosing the digital gain
blocks and filter stages in both transmit and receive
paths. The signal path starts with 8-bit PCM data
input to the receive path and ends with 8-bit PCM
data at the output of the transmit path. The user can
bypass the companding process and interface
directly to the 16-bit data.
Rev. 1.3
3.32.2. Line Test and Diagnostics
The Dual ProSLIC devices provide a variety of signal
generation and measurement tools that facilitate fault
detection and parametric diagnostics on the TIP/RING
pair and line card functionality verification. The Dual
ProSLIC
appropriate voltage/current/signal levels, and processes
the results to provide a meaningful result to the user.
Interaction is required from the host microprocessor to
load the test parameters into the appropriate registers,
initiate the test(s), and read the results from the
registers. In some cases, the host processor might also
be required to perform some simple mathematics to
achieve the results. Software modules are available to
simplify integration of the diagnostics functions into the
system. The need for test relays and a separate test
head is eliminated in most applications. To address
legacy applications, all versions of the Dual ProSLIC
include test-in and test-out relay drivers to switch in a
centralized test card.
The Dual ProSLIC line test and diagnostics capabilities
are categorized into three sections: signal generation
tools, measurement tools, and diagnostics capabilities.
Using these signal generation and measurement tools,
a variety of other diagnostic functions can be performed
to
applications. Table 52 summarizes the ranges and
capabilities of the signal generation and measurement
tools.
A third digital loopback takes the digital stream at the
output of the µ-Law/A-Law expander and feeds it
back to the input of the µ-Law/A-Law compressor.
(See DLM1 path in Figure 11.) This path verifies that
the host is connected correctly with the Dual
ProSLIC through the PCM interface and that the
PCLK and FSYNC signals are correctly set. This
mode also can test the µ-Law/A-Law companding
process. The signal path starts with 8-bit PCM data
input to the receive path and ends with 8-bit PCM
data at the output of the transmit path. The user can
also connect directly to the 16-bit data to eliminate
the µ-Law/A-Law companding process when testing
the PCM interface.
meet
generates
the
unique
test
requirements
signals,
measures
of
specific
the

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