SI3200-G-GS Silicon Laboratories Inc, SI3200-G-GS Datasheet - Page 67

• Manufacturer Part Number: SI3200-G-GS
• Description: SLIC 2-CH 63dB 45mA 3.3V 6-Pin SMD
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3200-G-GS

• Package: 6SMD
• Number Of Channels Per Chip: 2
• Polarity Reversal: Yes
• Longitudinal Balanced: 63 dB
• Loop Current: 45 mA
• Minimum Operating Supply Voltage: 3.13 V
• Typical Operating Supply Voltage: 3.3 V
• Typical Supply Current: 0.11 mA
• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 110µA
• Power (watts): 941mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.20.4. Tone Generator Interrupts
Both the active and inactive timers can generate an
interrupt to signal “on/off” transitions to the software.
The timer interrupts for tone generator 1 can be
individually enabled by setting the OS1TAE and OS1TIE
bits. Timer interrupts for tone generator 2 are OS2TAE
and OS2TIE. A pending interrupt for each of the timers
is determined by reading the OS1TAS, OS1TIS,
OS2TAS, and OS2TIS bits in the IRQVEC1 register.
3.21. Caller ID Generation
The Dual ProSLIC devices generate caller ID signals in
compliance with various Bellcore and ITU specifications
as described in Table 36 by providing continuous phase
binary frequency shift keying (FSK) modulation.
Oscillator 1 is required because it preserves phase
continuity during frequency shifts whereas Oscillator 2
does not. Figure 37 illustrates a typical caller ID
transmission sequence in accordance with Bellcore
Parameter
FSK Start & Stop Bit Enable
Oscillator 1 Active Timer
FSK Data Byte
FSK Frequency for Space
FSK Frequency for Mark
FSK Amplitude for Space
FSK Amplitude for Mark
FSK 0-1 Transition Freq, High
FSK 0-1 Transition Freq, Low
FSK 1-0 Transition Freq, High
FSK 1-0 Transition Freq, Low
*Note: Oscillator 1 active timer range and LSB stage valid only for FSK mode.
Table 37. Register and RAM Locations used for Caller ID Generation
Space Frequency (logic 0)
Mark Frequency (logic 1)
Transmission Rate
Parameter
Table 36. FSK Modulation Requirements
O1TALO/O1TAHI
Register/RAM
FSKFREQ0
FSKFREQ1
Mnemonic
FSKAMP0
FSKAMP1
FSK01LO
FSK10LO
FSK01HI
FSK10HI
FSKDAT
OMODE
ITU-T V.23 Bellcore GR-30-CORE
Rev. 1.3
1300 Hz
2100 Hz
Register/RAM Bits
FSKFREQ0[15:3]
FSKFREQ1[15:3]
FSKAMP0[15:3]
FSKAMP1[15:3]
FSK01LO[15:3]
FSK10LO[15:3]
requirements.
The register and RAM locations for caller ID generation
are listed in Table 37. Caller ID data is entered into the
8-bit FSKDAT register. The data byte is double buffered
so that the Dual ProSLIC can generate an interrupt
indicating the next data byte can be written when
processing begins on the current data byte. The caller
ID data can be transmitted in one of two modes
controlled
O1FSK8 = 0 (default case), the 8-bit caller ID data is
transmitted with a start bit and stop bit to create a 10-bit
data sequence. If O1FSK8 = 1, the caller ID data is
transmitted as a raw 8-bit sequence with no start or stop
bits. The value programmed into the OSC1TA register
determines the bit rate, and the interrupt rate is equal to
the bit rate divided by the data sequence length (8 or 10
bits).
FSK01HI[15:3]
FSK10HI[15:3]
OSC1TA[15:0]
FSKDAT[7:0]
O1FSK8
1200 baud
Si3220/25 Si3200/02
by
1200 Hz
2200 Hz
the
Description/Range (LSB Size)
O1FSK8
0 to 2.73 s (41.66 µs)*
Enable/disable
Caller ID data
Audio range
Audio range
register
bit.
When
67