SI3200-G-GS Silicon Laboratories Inc, SI3200-G-GS Datasheet - Page 94

• Manufacturer Part Number: SI3200-G-GS
• Description: SLIC 2-CH 63dB 45mA 3.3V 6-Pin SMD
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3200-G-GS

• Package: 6SMD
• Number Of Channels Per Chip: 2
• Polarity Reversal: Yes
• Longitudinal Balanced: 63 dB
• Loop Current: 45 mA
• Minimum Operating Supply Voltage: 3.13 V
• Typical Operating Supply Voltage: 3.3 V
• Typical Supply Current: 0.11 mA
• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 110µA
• Power (watts): 941mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si3220/25 Si3200/02
When the Dual ProSLIC is set to GCI mode at
initialization, the default setting ignores the downstream
SC channel byte and allows linefeed state commands to
be directed through the monitor channel. This default
configuration is enabled by initializing the GCILINE bit
of the PCMMODE register to 0, which prevents the Dual
ProSLIC from transitioning between linefeed operating
states due to invalid data that may exist within the
downstream SC channel byte. To transfer direct linefeed
control to the downstream SC channel, the user must
set the GCILINE bit to 1. Once the GCILINE bit has
been set, the Dual ProSLIC follows the commands that
are contained in the downstream SC channel byte as
described in Figure 62.
The Dual ProSLIC architecture also enables automatic
transitions between linefeed operating states to reduce
the amount of interaction required between the host
processor and the Dual ProSLIC. When a GCI bus is
implemented, the user must ensure that these
automatic linefeed state transitions are consistent with
the
downstream SC channel byte.
In normal operation, these automatic linefeed state
transitions are accompanied by the setting of a
threshold detection flag and an interrupt bit, if enabled.
To allow the Dual ProSLIC to automatically detect the
94
linefeed
commands
Receive New
Figure 63. Protocol for Receiving C/I Bits in the Dual ProSLIC
Receive New
C/I Code
Store in S
C/I Code
= P?
= S?
= P?
No
No
No
contained
Yes
Yes
Yes
within
the
Rev. 1.3
With New C/I Bits
Load C/I Register
P: C/I Primary Register Contents
S: C/I Secondary Register Contents
appropriate
transitions, the downstream SC channel byte should be
updated accordingly once the interrupt bit is read from
the upstream SC channel byte. To disable the automatic
transitions, the user must set the GCILINE bit. Enabling
this manual mode requires the host processor to read
the upstream SC channel information and provide the
appropriate downstream SC channel byte command to
program the correct linefeed state.
Table 50
transitions and their associated registers that cause the
transition.
The transition to the OPEN state stemming from power
alarm detection is intended to protect the Dual ProSLIC
circuit in the event that too much power is dissipated in
the Si3200/2 LFIC. This alarm is typically due to a fault
in the application circuit or on the subscriber loop but
can be caused by intermittent power spikes depending
on the threshold to which the alarm is set. The user can
re-initialize the linefeed operating state that was in effect
just prior to the power alarm by toggling the downstream
SC channel byte to the OPEN state for two consecutive
cycles and then resetting the downstream SC channel
byte to the intended linefeed state for two consecutive
cycles. If the Dual ProSLIC continues to automatically
transition to the OPEN state, the power alarm threshold
presents
thresholds
the
and
automatic
control
linefeed
the
linefeed
state