LE58QL021BVC Zarlink, LE58QL021BVC Datasheet - Page 41

• Manufacturer Part Number: LE58QL021BVC
• Description: QUAD, SLAC, PROG CODEC, 3.3V, 20 I/0, PQT44, LEAD FREE
• Manufacturer: Zarlink

00h Deactivate (Standby State)
In the Deactivate (Standby) state:
02h Software Reset
The action of this command is identical to that of the RST pin except that it only operates on the channels selected by the
Channel Enable Register and it does not change clock slots, time slots, PCM highways ground key sampling interval, or global
chip parameters. See the note under the hardware reset command that follows.
04h Hardware Reset
Hardware reset is equivalent to pulling the RST on the device Low. This command does not depend on the state of the Channel
Enable Register.
Note:
The action of a hardware reset is described in Reset States on
06h No Operation
0Eh Activate Channel (Operational State)
This command places the device in the Active state and sets CSTAT = 1. No valid PCM data is transmitted until after the
third FS pulse is received following the execution of the Activate command.
Command
Command
Command
Command
Command
All programmed information is retained.
The Microprocessor Interface (MPI) remains active.
The PCM inputs are disabled and the PCM outputs are high impedance unless signaling on the PCM high
way is programmed (SMODE = 1).
The analog output (VOUT) is disabled and biased at VREF.
The channel status (CSTAT) bit in the SLIC device I/O Direction and Channel Status Register is set to 0.
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Zarlink Semiconductor Inc.
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of the section Operating the QLSLAC Device.
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