LE58QL021BVC Zarlink, LE58QL021BVC Datasheet - Page 60

• Manufacturer Part Number: LE58QL021BVC
• Description: QUAD, SLAC, PROG CODEC, 3.3V, 20 I/0, PQT44, LEAD FREE
• Manufacturer: Zarlink

APPLICATIONS
The QLSLAC device performs a programmable codec/filter function for four telephone lines. It interfaces to the telephone lines
through a Legerity SLIC device or a transformer with external buffering. The QLSLAC device provides latched digital I/O to control
and monitor four SLIC devices and provides access to time-critical information, such as off/on-hook and ring trip, for all four
channels via a single read operation. When various country or transmission requirements must be met, the QLSLAC device
enables a single SLIC device design for multiple applications. The line characteristics (such as apparent impedance, attenuation,
and hybrid balance) can be modified by programming each QLSLAC device channel’s coefficients to meet desired performance.
The QLSLAC device may require an external buffer to drive transformer SLIC devices.
Connection to a PCM back plane is implemented by means of a simple buffer chip. Several QLSLAC devices can be tied together
in one bus interfacing the back plane through a single buffer. An intelligent bus interface chip is not required because each
QLSLAC device provides its own buffer control (TSXA/B). The QLSLAC device is controlled through the microprocessor
interface, either by a microprocessor on the line card or by a central processor.
Controlling the SLIC Device
The Le58QL021 QLSLAC device has five TTL-compatible I/O pins (CD1, CD2, C3 to C5) for each channel. The Le58QL031
QLSLAC device has only CD1 and CD2 available. The outputs are programmed using Command 52h, and the status is read
back using Command 53h. CD1 and CD2 for all four channels can be read back using Command 4D/4Fh. The direction of the
I/O pins (input or output) is specified by programming the SLIC device I/O direction register (Command 54/55h).
Calculating Coefficients with WinSLAC Software
The WinSLAC software is a program that models the QLSLAC device, the line conditions, the SLIC device, and the line card
components to obtain the coefficients of the programmable filters of the QLSLAC device and some of the transmission
performance plots.
The following parameters relating to the desired line conditions and the components/circuits used in the line card are to be
provided as input to the program:
1.
2.
3.
4.
5.
6.
7.
The output from the WinSLAC program includes the coefficients of the GR, GX, Z, R, X, and B filters as well as transmission
performance plots of two-wire return loss, receive and transmit path frequency responses, and four-wire return loss.
The software supports the use of the Legerity SLIC devices or allows entry of a SPICE netlist describing the behavior of any type
of SLIC device circuit.
Line impedance or the balance impedance of the line is specified by the local telephone system.
Desired two-wire impedance that is to appear at the line card terminals of the exchange.
Tabular data for templates describing the frequency response and attenuation distortion of the design.
Relative analog signal levels for both the transmit and receive two-wire signals.
Component values and SLIC device selection for the analog portion of the line circuits.
Two-wire return loss template is usually specified by the local telephone system.
Four-wire return loss template is usually specified by the local telephone system.
Zarlink Semiconductor Inc.
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