MT48LC16M16A2P-75 L:D TR Micron Technology Inc, MT48LC16M16A2P-75 L:D TR Datasheet - Page 30

• Manufacturer Part Number: MT48LC16M16A2P-75 L:D TR
• Description: DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II T/R
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC16M16A2P-75 L:D TR

• Package: 54TSOP-II
• Density: 256 Mb
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Clock Rate: 133 MHz
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1191-2

PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
11. Required clocks are specified by JEDEC functionality and are not dependent on any tim-
12. CLK must be toggled a minimum of two times during this period.
13. Based on
14. The clock frequency must remain constant (stable clock is defined as a signal cycling with-
15. Auto precharge mode only. The precharge timing budget (
16. Precharge mode only.
17. JEDEC and PC100 specify three clocks.
18.
19. Parameter guaranteed by design.
20. PC100 specifies a maximum of 6.5pF.
21. For operating frequencies ≤ 45 MHz,
22. Auto precharge mode only. The precharge timing budget (
ing parameter.
in timing constraints specified for the clock pin) during access or precharge states
(READ, WRITE, including
the data rate.
7.5ns for -75 after the first clock delay and after the last WRITE is executed.
t
the first clock delay, after the last WRITE is executed. May not exceed limit set for pre-
charge mode.
AC for -75/-7E at CL = 3 with no load is 4.6ns and is guaranteed by design.
t
CK = 7.5ns for -75 and -7E, 6ns for -6A.
Electrical Specifications – AC Operating Conditions
t
WR, and PRECHARGE commands). CKE may be used to reduce
30
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
CKS = 3.0ns.
256Mb: x4, x8, x16 SDRAM
t
t
RP) begins at 7ns for -7E and
RP) begins 6ns for -6A after
© 1999 Micron Technology, Inc. All rights reserved.