MT48LC16M16A2P-75 L:D TR Micron Technology Inc, MT48LC16M16A2P-75 L:D TR Datasheet - Page 63

• Manufacturer Part Number: MT48LC16M16A2P-75 L:D TR
• Description: DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II T/R
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC16M16A2P-75 L:D TR

• Package: 54TSOP-II
• Density: 256 Mb
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Clock Rate: 133 MHz
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1191-2

Figure 32: Random WRITE Cycles
Figure 33: WRITE-to-READ
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Note:
Note:
Command
Command
Address
Address
1. Each WRITE command can be issued to any bank. DQM is LOW.
1. The WRITE command can be issued to any bank, and the READ command can be to any
bank. DQM is LOW. CL = 2 for illustration.
CLK
CLK
DQ
DQ
WRITE
WRITE
Bank,
Bank,
Col n
Col n
D
D
T0
T0
IN
IN
WRITE
Bank,
Col a
NOP
D
T1
T1
D
IN
IN
63
WRITE
Bank,
Col x
READ
Bank,
Col b
D
T2
T2
IN
Don’t Care
Micron Technology, Inc. reserves the right to change products or specifications without notice.
WRITE
Bank,
Col m
T3
T3
NOP
D
IN
D
NOP
T4
OUT
256Mb: x4, x8, x16 SDRAM
Don’t Care
NOP
D
T5
OUT
© 1999 Micron Technology, Inc. All rights reserved.
WRITE Operation