LFE2M20E-6FN484C LATTICE SEMICONDUCTOR, LFE2M20E-6FN484C Datasheet - Page 109

• Manufacturer Part Number: LFE2M20E-6FN484C
• Description: FPGA LatticeECP2M Family 19000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFE2M20E-6FN484C

• Package: 484FBGA
• Family Name: LatticeECP2M
• Device Logic Units: 19000
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 304
• Ram Bits: 1246208

Lattice Semiconductor
LatticeECP2 Pin Information Summary, LFE2-6 and LFE2-12 (Cont.)
Available DDR-Interfaces per I/O
Bank
PCI Capable I/Os per Bank
1. Minimum requirement to implement a fully functional 8-bit wide DDR bus. Available DDR interface consists of at least 12 I/Os (1 DQS + 1
DQSB + 8 DQs + 1 DM + Bank VREF1).
1
Pin Type
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
4-6
TQFP
144
18
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
0
0
LFE2-6
fpBGA
256
32
14
0
0
1
0
2
1
1
1
0
0
0
0
0
0
0
0
LatticeECP2/M Family Data Sheet
TQFP
144
18
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PQFP
208
19
18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Pinout Information
LFE2-12
fpBGA
256
32
17
0
0
1
0
2
1
1
1
0
0
0
0
0
0
0
0
fpBGA
484
46
46
0
0
1
0
3
3
1
1
0
0
0
0
0
0
0
0