PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 152

• Manufacturer Part Number: PSB50505EV13GXT
• Manufacturer: Lantiq

Specifications of PSB50505EV13GXT

• Lead Free Status / RoHS Status: Supplier Unconfirmed

p_atm
p_ces
p_acm
p_srts
p_slp
p_ulp
p_dlp
p_rx_act
Data Sheet
1 =
Port ATM mode
0 =
1 =
Port circuit emulation service
X =
0 =
1 =
Port ACM enable
X =
0 =
1 =
Port SRTS enable
For the PXB4220 this bit enables SRTS clock recovery. This is only
useful for AAL ports in unstructured CES.
For the PXB4221 this bit is tied to "0". Writing "1" has no effect.
X =
0 =
1 =
Port serial loopback enable
0 =
1 =
Port upstream UTOPIA loopback (works even if UTOPIA interface is
disabled)
0 =
1 =
Port downstream UTOPIA loopback
0 =
1 =
Port receive activate
0 =
1 =
Enabled
AAL (CES) mode port
ATM (PHY) mode port
When p_atm = 1 and for PXB 4219 version
Structured (N
Unstructured
When p_atm = 1
Disabled
Enabled
When p_atm = 1
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
64 kbit/s)
152
PXB 4219E, PXB 4220E, PXB 4221E
Register Description
IWE8, V3.4
2003-01-20