PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 252
PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
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Table 37
No.
4
5
6
7
1)
Framer Transmit Interface
Figure 60
Data Sheet
RFCLK
FTCKO
FTFRS
FTDAT
FTMFS
In case the Internal Clock Recovery Circuit is used for SRTS, the frequency deviation should be +/- 10 ppm
Parameter
T1:
Setup time FRDAT before FRCLK
falling (center of bit period)
Hold time FRDAT after FRCLK falling
(center of bit period)
Setup time FRMFB before FRCLK
falling (center of bit period)
Hold time FRMFB after FRCLK falling
(center of bit period)
Framer Receive Interface Timing in GIM (cont’d)
Framer Transmit Interface Timing in GIM
1
3
4
5
252
PXB 4219E, PXB 4220E, PXB 4221E
2
Min
15
15
15
15
Limit Values
Typ
1,544
Electrical Characteristics
3
5
Max
IWE8, V3.4
2003-01-20
Unit
MHz
ns
ns
ns
ns
FtitGIM
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