PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 268
PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
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10
10.1
10.2
The following table shows the instruction binary codes for the 4 bit instruction register.
Code
10.3
Table 53
cells of type “control” will disable the corresponding outputs when set. The control cells
are preset to a safe logic-1 during the TEST-LOGIC-RESET state of the TAP controller.
Table 53
Data Sheet
Name
ftcko_4_o
ftcko_4_i
ftcko_4_c
ftcko_5_o
ftcko_5_i
ftcko_5_c
rtsen_n
mpcs_n
Version(3:0)
31
0100
describes the Boundary-Scan register. The register contains 299 cells. The
B
Testmode
Device Identification Register
Instruction Register
Boundary-Scan Instruction Register Binary Codes
0000 = EXTEST
0001 = IDCODE
0101 = SAMPLE
0101 = INTEST
0111 = CLAMP
1111 = BYPASS
Boundary-Scan Register
28
Boundary Scan Register
27
0000000001000110
Partnumber(15:0)
Name
rxdat_2_o
rxdat_3_o
rxdat_4_o
rxdat_5_o
rxdat_6_o
rxdat_7_o
rxprt_o
rxprt_c
1)
1)
268
B
PXB 4219E, PXB 4220E, PXB 4221E
12
Manufacturer-ID(10:0)
11
00001000001
Name
ftcko_0_o
ftcko_0_i
ftcko_0_c
frfrsn_0_o
frfrsn_0_c
ftdat_0_o
ftdat_0_c
ftmfs_0_o
B
1
IWE8, V3.4
Testmode
2003-01-20
0
1
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