PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 50
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PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
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Figure 11
In contrast to this the ATM-Forum recommends in the User-network interface
specification that the receiving ATM entity is responsible for extraction and discarding of
unassigned and idle cells.
Figure 12
The RX Idle/Unassigned Cell Control Register (rxid, see
order to achieve ITU-T or ATM-Forum compliance.
The 4 MSBs of header octet 1 and the 4 LSBs of header octet 4 of the received cells to
be discarded are programmable in bits “prg_rx_hd”. All other header bits must be 0. On
top the “msk_rx_hd” field of “rxid” allows to mask all or some of these bits. The masked
bits are considered as “don’t care”.
• If ITU-T I.361 compliance is desired, the “prg_rx_hd” field should be set to 0000 0001.
Data Sheet
1 and 2)
Physical OAM cell
identification (Note 2) layer
Reserved for use of the
physical layer (Notes 1, 2
and 3)
Use
invalid
unassigned
Idle cell identification (Notes
P: Indicates the bit is available for use by the physical layer
Notes:
1 In the case of physical layer cells, the bit in the location of the CLP indication is not used for the CLP
2 Cells having header values which are identified as idle, physical layer OAM, and reserved for use by the
3 Specific pre-assigned physical layer cell header values are given in Recommendation I.432
X: Indicates “don’t care” bits
If only idle cells should be deleted, the “msk_rx_hd” should be set to 0000 0000.
If all physical layer cells should be deleted, the “msk_rx_hd” should be set to 1111
1110.
Values assigned to these but have no meaning with respect to the fields occupying the corresponding bit
positions at the ATM layer
mechanism as specified in 3.4.2.3.2/I.150.
physical layer are not passed to the ATM layer from the physical layer.
Pre-assigned cell header values at the UNI (Table 1/I.361)
Pre-defined header field values [11]
Octet 1
0000/0000
0000/0000
PPPP/0000
Octet 1
XXXX/0000
0000/0000
50
PXB 4219E, PXB 4220E, PXB 4221E
Octet 2
0000/0000
0000/0000
0000/0000
Octet 2
0000/0000
0000/0000
Chapter
Octet 3
0000/0000
0000/0000
0000/0000
Octet 3
0000/0000
0000/0000
Operational Description
7.9) can be used in
Octet 4
0000/0001
0000/1001
0000/PPP1
Octet 4
0000/XXX1
0000/XXX0
IWE8, V3.4
2003-01-20
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