PXB4219EV34NP Infineon Technologies, PXB4219EV34NP Datasheet - Page 103
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PXB4219EV34NP
Manufacturer Part Number
PXB4219EV34NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PXB4219EV34NP.pdf
(290 pages)
Specifications of PXB4219EV34NP
Data Rate
2.048Mbps
Number Of Channels
1
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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FTFRS[7:0]
RFCLK
Figure 27
5.1.4
In this mode (pin EC = 0) transmit and receive channels are synchronized.
The framer interface is clocked with an 8.192 MHz clock connected to RFCLK.
All receive channels and the channels transmitted on even ports (near-end signal with
echo) are synchronized by means of the FTFRS[0] pin. Shift exists between odd and
even FTDAT ports
FRCLK[7:0]
FRDAT[7:0]
FRMFB[7:0]
FRFRS[7:0]
FRLOS[7:0]
FTCKO[7:0]
FTDAT[7:0]
Data Sheet
RFCLK
FRDATn
FRMFB
FTDATn
B8
248
B8
248
Echo Canceller Mode (EC)
B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8
B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8 B1 B2 B3 B4 B5 B6 B7 B8
249
249
Framer Interface in SYM8 E1
250
250
251
251
Framer Transmit Frame Synchronization Pulse
Unused
Reference Clock
Central framer interface clock with 8.192 MHz
timeslot 31
Framer Receive Clock
Unused
Framer Receive Data
FRDAT is sampled in the middle of the bit period on the falling
edge of RFCLK
Framer Receive Multiframe Begin
Unused
Framer Receive Frame Synchronization Pulse
Unused
Framer Receive Loss of Signalling
Framer Transmit Clock
Unused
Framer Transmit Data
FTDAT is clocked with the falling edge of RFCLK:
252
252
253
253
254
254
255
255
256
256
1
1
2
2
103
3
3
PXB 4219E, PXB 4220E, PXB 4221E
timeslot 0
4
4
5
5
6
6
7
7
8
8
9
9
Interface Description
10
10
11
11
timeslot 1
12
12
13
13
IWE8, V3.4
2003-01-20
14
14
15
15
Fisym8e1
16
16
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