PXB4219EV34NP Infineon Technologies, PXB4219EV34NP Datasheet - Page 110
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PXB4219EV34NP
Manufacturer Part Number
PXB4219EV34NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PXB4219EV34NP.pdf
(290 pages)
Specifications of PXB4219EV34NP
Data Rate
2.048Mbps
Number Of Channels
1
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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5.4
It is possible to use an external device for clock recovery instead of the ICRC. Therefore
an external clock recovery interface is provided.
It allows the transmission and reception of serial communication frames containing
SRTS values or ACM buffer filling levels to and from an external clock recovery circuit.
The usage is controlled by the bits “rtsgen” and “rts_eval” in the Operation Mode
Register (“opmo”, see
The Clock Recovery Interface is a 5 line serial interface: 1 data input SDI, 2 data outputs
SDOD and SDOR and 1 synchronization output SSP. The interface allows connection to
external clock recovery circuits. Two methods for clock recovery are supported:
Synchronous Residual Time Stamp (SRTS) and Adaptive Clock Method (ACM). The
IWE8 also allows a combination of SRTS and ACM.
The data sent over the serial lines is always formatted in frames of 32 bits.
The SSP pulse indicates the frame start for both directions. The inter-frame delay should
be equivalent to the payload of 8 ATM cells (e.g. for completely filled cells without SDT
every 3008 clock periods). Each valid frame is supposed to contain a valid RTS value
Table 27
sent, idle frames are transmitted consisting of bits [31:1] all 1 and parity bit[ 0] = 0.
Table 27
Table 27
Bits
31- 29
28 - 25
24 - 11
10
9 - 8
7 - 5
4 - 2
1
0
Data Sheet
also indicates which data fields are used on the different interface signals.
shows the interface frame format. Bit [31] is sent first. When no data is to be
Clock Recovery Interface
Clock Recovery Interface frame format
Data field
111
RTS[3:0]
buffer_fill[13:0]
RTS_valid
00
port_nr[2:0]
type[2:0]
001: RTS only
010: “buffer_fill” only
011: RTS + “buffer_fill”
111: reset RTS logic
others: not used
frame_invalid
odd_parity
Chapter
7.24).
110
PXB 4219E, PXB 4220E, PXB 4221E
SDI
Yes
Yes
No
No
Yes
Yes
No
No
No
No
Yes
Yes
SDOD
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Interface Description
No
SDOR
Yes
No
No
Yes
Yes
No
No
No
Yes
Yes
Yes
IWE8, V3.4
2003-01-20
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