PXB4219EV34NP Infineon Technologies, PXB4219EV34NP Datasheet - Page 8
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PXB4219EV34NP
Manufacturer Part Number
PXB4219EV34NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PXB4219EV34NP.pdf
(290 pages)
Specifications of PXB4219EV34NP
Data Rate
2.048Mbps
Number Of Channels
1
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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Table of Contents
7.47
7.48
7.49
7.50
7.51
7.52
7.53
7.54
7.55
7.56
7.57
7.58
7.59
7.60
7.61
7.62
7.63
7.64
7.65
7.66
7.67
8
8.1
8.2
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
8.3.7
8.3.8
9
9.1
9.2
9.3
9.4
9.5
9.6
9.6.1
Data Sheet
Configuration Register Downstream of Port N (condN) . . . . . . . . . . . . . . 204
Interrupt Source of Port N (irsN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
Interrupt Mask of Port N (irmN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
Test Input of Port N (tsinN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Configuration Register Upstream Direction of Port N (conuN) . . . . . . . . 209
Average Buffer Filling of Port N (avbN) . . . . . . . . . . . . . . . . . . . . . . . . . . 210
ACM Shift Factor of Port N (asfN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
Time of Initial Free Run of Port N (tiniN) . . . . . . . . . . . . . . . . . . . . . . . . . 212
Threshold Out of Lock Detection of Port N (tresh) . . . . . . . . . . . . . . . . . . 213
ICRC Parity Errors at Clock Recovery Interface (per) . . . . . . . . . . . . . . . 214
ICRC Synchronization Errors at Clock Recovery Interface (scri) . . . . . . 215
ICRC Clock Recovery Interface FIFO Overflow (crifo) . . . . . . . . . . . . . . 216
ICRC Version Register (icrcv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
SRTS Receive FIFO Underflow of Port N (sruN) . . . . . . . . . . . . . . . . . . . 218
SRTS Receive FIFO Overflow of Port N (sroN) . . . . . . . . . . . . . . . . . . . . 219
SRTS Generator Reset of Port N (srrN) . . . . . . . . . . . . . . . . . . . . . . . . . 220
SRTS Invalid Value Processed of Port N (sriN) . . . . . . . . . . . . . . . . . . . . 221
ACM Data Too Late of Port N (atlN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Out Of Lock Register of Port N (oolN) . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Status Register of Port N (statN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Test Output Register of Port N (tsoutN) . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Application Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Clock Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Translating AAL Statistics Counters into the ATMF CES Version 2 MIB . 228
Jitter Characteristics of the Internal Clock Recovery Circuit . . . . . . . . . . 230
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Thermal Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
Capacitances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
ACM Jitter Tolerance in E1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
ACM Jitter Tolerance in T1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
SRTS Jitter Tolerance in E1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
SRTS Jitter Tolerance in T1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
ACM Jitter Transfer in E1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
ACM Jitter Transfer in T1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
SRTS Jitter Transfer in E1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
SRTS Jitter Transfer in T1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
Clock and Reset Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
8
PXB 4219E, PXB 4220E, PXB 4221E
IWE8, V3.4
2003-01-20
Page
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