LAN9115-MT Standard Microsystems (SMSC), LAN9115-MT Datasheet - Page 136

no-image

LAN9115-MT

Manufacturer Part Number
LAN9115-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9115-MT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9115-MT
Manufacturer:
Standard
Quantity:
1 907
Part Number:
LAN9115-MT
Manufacturer:
SMSC
Quantity:
672
Part Number:
LAN9115-MT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN9115-MT
Manufacturer:
SMSC
Quantity:
1 000
Part Number:
LAN9115-MT
Manufacturer:
SMSC/PBF
Quantity:
182
Part Number:
LAN9115-MT
Manufacturer:
SMSC
Quantity:
20 000
Company:
Part Number:
LAN9115-MT
Quantity:
2
Company:
Part Number:
LAN9115-MT
Quantity:
124
Company:
Part Number:
LAN9115-MT
Quantity:
106
Part Number:
LAN9115-MT-E2
Manufacturer:
SMSC
Quantity:
3 994
Part Number:
LAN9115-MT-E2
Manufacturer:
SMSC
Quantity:
20 000
Chapter 9 Revision History
Revision 1.5 (07-11-08)
REVISION LEVEL & DATE
(06-20-08)
(06-12-08)
Rev. 1.4
Rev. 1.4
Table 2.5, “System and
Power Signals,” on page 17
Figure 1.2 on page 11
Table 2.4, “Serial EEPROM
Interface Signals,” on
page 16
Section 3.5, "Wake-up
Frame Detection," on
page 28
"MAC_CR—MAC Control
Register," on page 99
Section 5.4.12, "WUCSR—
Wake-up Control and Status
Register," on page 107
Section 5.5.5, "Auto-
negotiation Advertisement,"
on page 112
Section 5.5.5, "Auto-
negotiation Advertisement,"
on page 112
Section 7.1, "Absolute
Maximum Ratings*," on
page 129
"Operating Conditions**," on
page 129
SECTION/FIGURE/ENTRY
Table 9.1 Customer Revision History
and
and
Section 5.4.1,
Section 7.2,
DATASHEET
136
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Added text to VDD_CORE and VDD_PLL pin
descriptions that states the pins must not be used
to supply power to external devices.
Diagrams redone. A PLL regulator block was
added and the word “Core” was added to the
original regualtor block.
Added note to the EECLK pin: “When the
EEPROM interface is not used, the EECLK pin
must be left unconnected.”
(Per change request 737306-KL0774)
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the
up Control and Status
up frame will wake-up the device despite the state
of the Disable Broadcast Frames (BCAST) bit in
the
Fixed typo in bit 9: “... Mac Address [1:0] bit set to
0.” was changed to “...Mac Address [0] bit set to 0.”
Bits 9 and 15 relabeled as Reserved, Read-Only
(RO), with a default of 0.
Fixed definition of bits 11:10 when equal to “11” by
adding “advertise support for..” to beginning of
definition. Also added note stating “When both
symmetric PAUSE and asymmetric PAUSE
support are advertised, the device will only be
configured to, at most, one of the two settings
upon auto-negotiation completion.”
Removed 1.8V output voltage (VDD_PLL,
VDD_CORE) ratings and notes which stated:
“These pins must not be used to supply power to
other external devices.” These specifications are
not needed by the customer since the regulators
are not to be used for external applications.
MAC_CR—MAC Control
CORRECTION
Register, a broadcast wake-
Register.”
WUCSR—Wake-
SMSC LAN9115
Datasheet

Related parts for LAN9115-MT