LAN9115-MT Standard Microsystems (SMSC), LAN9115-MT Datasheet - Page 28

• Manufacturer Part Number: LAN9115-MT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9115-MT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

Revision 1.5 (07-11-08)
3.4.2.1
3.4.2.2
3.5
Hash Perfect Filtering
In hash perfect filtering, if the received frame is a physical address, the LAN9115 Packet Filter block
perfect-filters the incoming frame’s destination field with the value programmed into the MAC Address
High register and the MAC Address Low register. If the incoming frame is a multicast frame, however,
the LAN9115 packet filter function performs an imperfect address filtering against the hash table.
The imperfect filtering against the hash table is the same imperfect filtering process described in the
“Hash Only Filtering” section above.
Inverse Filtering
In inverse filtering, the LAN9115 Packet Filter Block accepts incoming frames with a destination
address not matching the perfect address (i.e., the value programmed into the MAC Address High
register and the MAC Address Low register in the CRC block and rejects frames with destination
addresses matching the perfect address.
For all filtering modes, when MCPAS is set, all multicast frames are accepted. When the PRMS bit is
set, all frames are accepted regardless of their destination address. This includes all broadcast frames
as well.
Setting the Wake-Up Frame Enable bit (WUEN) in the “WUCSR—Wake-up Control and Status
Register”, places the LAN9115 MAC in the wake-up frame detection mode. In this mode, normal data
reception is disabled, and detection logic within the MAC examines receive data for the pre-
programmed wake-up frame patterns. The LAN9115 can be programmed to notify the host of the wake-
up frame detection with the assertion of the host interrupt (IRQ) or assertion of the power managment
event signal (PME). Upon detection, the Wake-Up Frame Received bit (WUFR) in the WUCSR is set.
When the host clears the WUEN bit the LAN9115 will resume normal receive operation.
Before putting the MAC into the wake-up frame detection state, the host must provide the detection
logic with a list of sample frames and their corresponding byte masks. This information is written into
the Wake-up Frame Filter register (WUFF). Please refer to
Filter," on page 107
The MAC supports four programmable filters that support many different receive packet patterns. If
remote wake-up mode is enabled, the remote wake-up function receives all frames addressed to the
MAC. It then checks each frame against the enabled filter and recognizes the frame as a remote wake-
up frame if it passes the wakeup frame filter register’s address filtering and CRC value match.
In order to determine which bytes of the frames should be checked by the CRC module, the MAC uses
a programmable byte mask and a programmable pattern offset for each of the four supported filters.
The pattern’s offset defines the location of the first byte that should be checked in the frame. Since
the destination address is checked by the address filtering Function, the pattern offset is always greater
than 12.
The byte mask is a 31-bit field that specifies whether or not each of the 31 contiguous bytes within
the frame, beginning in the pattern offset, should be checked. If bit j in the byte mask is set, the
detection logic checks byte offset +j in the frame. In order to load the Wake-up Frame Filter register,
the host LAN driver software must perform eight writes to the Wake-up Frame Filter register (WUFF).
The Diagram shown in
up frame filter register’s structure.
Note 3.1
Note 3.2
Wake-up Frame Detection
Wake-up frame detection can be performed when LAN9115 is in the D0 or D1 power
states. In the D0 state, wake-up frame detection is enabled when the WUEN bit is set.
Wake-up frame detection, as well as Magic Packet detection, is always enabled and
cannot be disabled when the device enters the D1 state.
for additional information on this register.
Table 3.2, "Wake-Up Frame Filter Register Structure"
DATASHEET
28
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Section 5.4.11, "WUFF—Wake-up Frame
below, shows the wake-
SMSC LAN9115
Datasheet