LAN9420-NU Standard Microsystems (SMSC), LAN9420-NU Datasheet - Page 125
LAN9420-NU
Manufacturer Part Number
LAN9420-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9420-NU.pdf
(170 pages)
Specifications of LAN9420-NU
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Compliant
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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.4.4
BITS
31-0
Upper 32 bits of the 64-bit Hash Table
Multicast Hash Table High Register (HASHH)
The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the
destination address in the incoming frame is used to index the contents of the Hash table. The most
significant bit determines the register to be used (Hi/Low), while the other five bits determine the bit
within the register. A value of 00000 selects Bit 0 of the Multicast Hash Table Lo register and a value
of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.
If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All
Multicast” (MCPAS) bit is set (1), then all multicast frames are accepted regardless of the multicast hash
values.
The Multicast Hash Table Hi register contains the higher 32 bits of the hash table and the Multicast
Hash Table Low register contains the lower 32 bits of the hash table.
Offset:
DESCRIPTION
008Ch
DATASHEET
125
Size:
32 bits
TYPE
R/W
Revision 1.4 (12-17-08)
DEFAULT
32‘h0
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