PEB4265VV12NT Infineon Technologies, PEB4265VV12NT Datasheet - Page 71

no-image

PEB4265VV12NT

Manufacturer Part Number
PEB4265VV12NT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB4265VV12NT

On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
22
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Preliminary
The UTDR-OK respectively UTDX-OK bit (register INTREG3) will be set if both of the
following conditions hold for a time span of at least RTIME without breaks longer than
RBRKTime occurring:
1. The in-band signal exceeds a programmable level Lev
2. The difference of the in-band and the out-of-band signal levels exceeds Delta
The UTDR-OK respectively UTDX-OK bit will be reset if at least one of these conditions
is violated for a timespan of at least ETime during which the violation does not cease for
at least EBRKTime.
The times ETIME and EBRKTime help to reduce the effects of sporadic dropouts.
If the bandwidth parameter is programmed to a negative value, the UTD unit can be used
for the detection of silence intervals in the whole frequency range.
The DuSLIC UTD unit is compatible with ITU-T G.164.
The UTD is resistant to a modulation with 15 Hz sinusoidal signals and a phase reversal
but is not able to detect the 15 Hz modulation and the phase reversal.
3.8.5
Table 9
Table 9
Algorithm / Device
Caller ID Sender
(CIS)
Universal Tone
Detection (UTD)
DTMF Receiver
Line Echo Canceller
(LEC)
Operating System
The maximum capability of the EDSP is 32 MIPS.
Example:
• All devices enabled and LEC Length = 8 ms (LEN = 64):
• All devices enabled and LEC Length = 4 ms (LEN = 32):
• 4 x UTD, 2 x DTMF Receiver and 2 x LEC (8 ms) enabled:
Data Sheet
33.32 MIPS total computing load exceeding the 32 MIPS limit!
31.272 MIPS total computing load within the 32 MIPS limit.
29.85 MIPS total computing load within the 32 MIPS limit.
shows the MIPS requirements for each algorithm using the EDSP:
MIPS Requirements for EDSP Capabilities
MIPS Requirements
Used MIPS
1.736*n
1.208*n
6.296*n
(3.448 + 0.032*LEN)*n
1.432
CIS
UTD
DTMF
71
LEC
Conditions
n
n
receive for two channels
n
n
LEN - see
S
CIS
UTD
DTMF
LEC
.
= 0...2
= 0...2
= 0...4, transmit and
= 0...2
Functional Description
Page 239
2000-07-14
DuSLIC
UTD
.

Related parts for PEB4265VV12NT