CY8C5246AXI-038 Cypress Semiconductor Corp, CY8C5246AXI-038 Datasheet - Page 74

• Manufacturer Part Number: CY8C5246AXI-038
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5246AXI-038

• Lead Free Status / RoHS Status: Compliant

11.9.6 Phase-Locked Loop
Table 11-68. PLL DC Specifications
Table 11-69. PLL AC Specifications
Document Number: 001-55034 Rev. *G
I
Fpllin
Fpllout
Jperiod-rms Jitter (rms)
Notes
Parameter
DD
Parameter
40. This specification is guaranteed by testing the PLL across the specified range using the IMO as the source for the PLL.
41. PLL input divider, Q, must be set so that the input frequency is divided down to the intermediate frequency range. Value for Q ranges from 1 to 16.
42. Based on device characterization (Not production tested).
PLL operating current
PLL input frequency
PLL intermediate frequency
PLL output frequency
Lock time at startup
PLL output duty cycle
[42]
Description
Description
[40]
[40]
[41]
PRELIMINARY
In = 3 MHz, Out = 24 MHz
Output of prescaler
All PLL output frequencies
Conditions
Conditions
PSoC
®
5: CY8C52 Family Datasheet
Min
Min
24
45
–
1
1
–
–
Typ
200
Typ
–
–
–
–
–
–
Max
Max
250
250
48
67
55
3
–
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Units
Units
MHz
MHz
MHz
µA
µs
ps
%
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