MC9S12DG128VPVE Freescale, MC9S12DG128VPVE Datasheet - Page 23
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MC9S12DG128VPVE
Manufacturer Part Number
MC9S12DG128VPVE
Description
Manufacturer
Freescale
Datasheet
1.MC9S12DG128VPVE.pdf
(142 pages)
Specifications of MC9S12DG128VPVE
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
50MHz
Interface Type
SCI/SPI/I2C/CAN
Total Internal Ram Size
8KB
# I/os (max)
91
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.25V
Operating Supply Voltage (min)
2.25/2.35/4.5V
On-chip Adc
2(8-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
128KB
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12DG128VPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Document References
The Device User Guide provides information about the MC9S12DT128 device made up of standard
HCS12 blocks and the HCS12 processor core.
This document is part of the customer documentation. A complete set of device manuals also includes all
the individual Block User Guides of the implemented modules. In a effort to reduce redundancy all module
specific information is located only in the respective Block User Guide. If applicable, special
implementation details of the module are given in the block description sections of this document.
See Table 0-3 for names and versions of the referenced documents throughout the Device User Guide.
Freescale Semiconductor
Analog to Digital Converter 10 Bit 8 Channel (ATD_10B8C) Block User Guide
Enhanced Capture Timer 16 Bit 8 Channel (ECT_16B8C) Block User Guide
Pulse Width Modulator 8 Bit 8 Channel (PWM_8B8C) Block User Guide
– Port S[3:2]
– PAD[15:8] (ATD1 channels)
PS3:2 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
Out of reset the ATD1 is disabled preventing current flows in the pins. Do not modify the ATD1
registers!
Byte Level Data Link Controller -J1850 (BDLC) Block User Guide
HCS12 Multiplexed External Bus Interface (MEBI) Block Guide
Port Integration Module (PIM_9DTB128) Block User Guide
HCS12 Background Debug Module (BDM) Block Guide
Asynchronous Serial Interface (SCI) Block User Guide
HCS12 Module Mapping Control (MMC) Block Guide
Clock and Reset Generator (CRG) Block User Guide
Motorola Scalable CAN (MSCAN) Block User Guide
Serial Peripheral Interface (SPI) Block User Guide
2K Byte EEPROM (EETS2K) Block User Guide
128K Byte Flash (FTS128K) Block User Guide
User Guide
Voltage Regulator (VREG) Block User Guide
Table 0-3 Document References
HCS12 Breakpoint (BKP) Block Guide
Inter IC Bus (IIC) Block User Guide
HCS12 Interrupt (INT) Block Guide
Oscillator (OSC) Block User Guide
Byteflight (BF) Block User Guide
HCS12 CPU Reference Manual
Device User Guide — 9S12DT128DGV2/D V02.16
Version
V02
V04
V03
V01
V04
V01
V04
V02
V01
V02
V02
V02
V02
V01
V02
V01
V01
V02
V01
V02
V01
Document Order Number
S12DTB128PIMV2/D
S12ECT16B8CV1/D
S12ATD10B8CV2/D
S12PWM8B8CV1/D
S12FTS128KV2/D
S12EETS2KV1/D
S12MSCANV2/D
S12VREGV1/D
S12BDLCV1/D
S12MEBIV3/D
S12MMCV4/D
S12BDMV4/D
S12CRGV4/D
S12OSCV2/D
S12CPUV2/D
S12BKPV1/D
S12INTV1/D
S12SCIV2/D
S12SPIV2/D
S12IICV2/D
S12BFV1/D
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