MC9S12DG128VPVE Freescale, MC9S12DG128VPVE Datasheet - Page 77

• Manufacturer Part Number: MC9S12DG128VPVE
• Manufacturer: Freescale

Specifications of MC9S12DG128VPVE

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 50MHz
• Interface Type: SCI/SPI/I2C/CAN
• Total Internal Ram Size: 8KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.25V
• Operating Supply Voltage (min): 2.25/2.35/4.5V
• On-chip Adc: 2(8-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Lead Free Status / RoHS Status: Compliant

Section 4 Modes of Operation
4.1 Overview
Eight possible modes determine the operating configuration of the MC9S12DT128. Each mode has an
associated default memory map and external bus configuration controlled by a further pin.
Three low power modes exist for the device.
4.2 Chip Configuration Summary
The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during
reset ((Table 4-1)). The MODC, MODB, and MODA bits in the MODE register show the current
operating mode and provide limited mode switching during operation. The states of the MODC, MODB,
and MODA pins are latched into these bits on the rising edge of the reset signal. The ROMCTL signal
allows the setting of the ROMON bit in the MISC register thus controlling whether the internal Flash is
visible in the memory map. ROMON = 1 mean the Flash is visible in the memory map. The state of the
ROMCTL pin is latched into the ROMON bit in the MISC register on the rising edge of the reset signal.
For further explanation on the modes refer to the HCS12 Multiplexed External Bus Interface Block Guide.
Freescale Semiconductor
BKGD =
MODC
0
0
0
0
1
1
1
1
MODB
PE6 =
0
0
1
1
0
0
1
1
PE7 = XCLKS
MODA
PE5 =
0
1
0
1
0
1
0
1
Table 4-2 Clock Selection Based on PE7
1
0
ROMCTL
PK7 =
Table 4-1 Mode Selection
X
X
X
X
Colpitts Oscillator selected
Pierce Oscillator/external clock selected
0
1
0
1
0
1
0
1
ROMON
Bit
1
1
0
0
1
0
1
0
1
1
0
1
Description
Special Single Chip, BDM allowed and ACTIVE. BDM is
allowed in all other modes but a serial command is
required to make BDM active.
Emulation Expanded Narrow, BDM allowed
Special Test (Expanded Wide), BDM allowed
Emulation Expanded Wide, BDM allowed
Normal Single Chip, BDM allowed
Normal Expanded Narrow, BDM allowed
Special Peripheral; BDM allowed but bus operations
would cause bus conflicts (must not be used)
Normal Expanded Wide, BDM allowed
Device User Guide — 9S12DT128DGV2/D V02.16
Mode Description
77