QG80333M500 S L9BH Intel, QG80333M500 S L9BH Datasheet - Page 48

• Manufacturer Part Number: QG80333M500 S L9BH
• Manufacturer: Intel

Specifications of QG80333M500 S L9BH

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Intel® 80333 I/O Processor
Documentation Changes
Documentation Changes
1.
Issue:
Workaround:
Affected Docs: Intel
2.
Issue:
Workaround:
Affected Docs: Intel
3.
Issue:
Workaround:
Affected Docs: Intel® 80333 I/O Processor Developer’s Manual (305432-001)
4.
Issue:
Workaround:
Affected Docs: Intel
48
V
V
OH1
OL1
Output High Voltage (DDR SDRAM)
Output Low Voltage (DDR SDRAM)
PCI clock timings table missing note
Table 25 needs a note added referencing support of class 2 clock jitter.
A fourth note has been added to Table 25 and appears as follows:
4 - Clock jitter class 2, per PCI-X Electrical and Mechanical Rev 2.0a specification
Wrong Voltage Values in Table 23
Table 23 shows wrong voltage values.
Replaced two rows in Table 23. The two rows now appear as follows:
SBR1 Programming When Bank 1 is Unpopulated
Section 8.7.6 incorrectly states: “If bank 1 is unpopulated, SBR1[6:0] is programmed either with
all zeroes or a value equal to SBR0[6:0].”
The sentence should be changed to “If bank 1 is unpopulated, SBR1[6:0] and SBR1[31:30] should
be programmed with a value equal to SBR0[6:0] and SBR0[31:30].”
PCI Express clock cycle time minimum
Table 27 in the 80333 datasheet shows the PCI Express clock cycle time, Tc2, as 10ns minimum.
Since the 80333 is compliant to PCI-Express 1.0a specification, this should be changed to 9.872ns
minimum.
®
®
®
80333 I/O Processor Datasheet (305433-001)
80333 I/O Processor Datasheet (305433-002).
80333 I/O Processor Datasheet (305433-003)
1.95
0.35
V
V
Specification Update
I
I
OH
OL
= -12.5 mA (1, 2)
= 12.5 mA (1, 2)