PEB20571FV31XP Infineon Technologies, PEB20571FV31XP Datasheet - Page 209

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PEB20571FV31XP

Manufacturer Part Number
PEB20571FV31XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20571FV31XP

Lead Free Status / Rohs Status
Compliant
6.2.5.2
HSTA Register
Reset value: 0001
DSPCTRL
HPRS(5:0)
CHCNT(5:0)
BITOR
HHOLD
Data Sheet
CHCNT(0)
HHOLD
15
7
HDLCU Status Register
DSP Access Control to the HDLCU
0 =
1 =
HDLC Channel Preset
Channel Count
Bitorder
Determines the order of bits inside an HDLC data byte going to (coming
from) the IOMU, PCMU or TRANSIU.
0 =
1 =
HDLCU Busy Indicator
0 =
1 =
H
BITOR
14
6
The HDLCU is currently processing the channel
The DSP is currently accessing the HDLCU
Number of HDLC channels handled by the HDLCU (max. 32)
Number of channels that have already been processed in the
current frame
HDLC data is transmitted with MSB first
HDLC data is transmitted with LSB first
HDLCU is processing the current frame
HDLCU has finished processing the current frame
13
5
x
read
12
HPRS(5:0)
4
192
11
3
CHCNT(5:1)
10
2
Register Description
Address: D180
9
1
PEB 20570
PEB 20571
DSPCTRL
2003-07-31
8
0
H

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