PPC460EX-SUB800N AMCC, PPC460EX-SUB800N Datasheet - Page 64

• Manufacturer Part Number: PPC460EX-SUB800N
• Manufacturer: AMCC

460EX – PPC460EX Embedded Processor
Table 9. Signal Functional Description (Part 1 of 10)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ to GND)
4. If not used, must pull up (recommended value is 3kΩ for LVTTL or 8.2kΩ for PCI to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up (recommended value is 3kΩ to OV
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PCI Interface
PCIAD00:31
PCIC0:3/BE0:3
PCI0Clk
PCI0DevSel
PCI0Frame
PCI0IRdy
PCI0TRdy
PCI0Stop
PCI0PErr
PCI0SErr
PCI0Req0/Gnt
PCI0Req1:3
PCI0Gnt0/Req
PCI0Gnt1:3
PCI0IDSel
PCI0INT
PCI0M66En
PCI0Par
GND) required
Signal Name
Address/Data bus (bidirectional).
PCI Command/Byte Enables
Provides timing to the PCI interface for PCI transactions.
Note: A clock is required even when the PCI interface is not
used. The frequency must be between 1MHz and 66MHz.
Indicates the driving device has decoded its address as the
target of the current access.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
Driven by the current master to indicate beginning and duration
of an access.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
Indicates initiating agent’s ability to complete the current data
phase of the transaction.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
I
phase of the transaction.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
Indicates the current target is requesting the master to stop the
current transaction.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
Reports data parity errors during all PCI transactions except a
Special Cycle.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
Reports address parity errors, data parity errors on the Special
Cycle command, or other catastrophic system errors.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
Indicates to the PCI arbiter that the specified agent wishes to use
the bus. When the internal arbiter is enabled, input is Req0.
When internal arbiter is disabled, input is Gnt.
(PCI 2.2 specification requires an 8.2K Ω pull-up on host system.)
An indication to the PCI arbiter that the specified agent wishes to
use the bus. Used only when internal PCI arbiter enabled.
Indicates that the specified agent is granted access to the bus.
When the internal arbiter is enabled, output is Gnt0. When the
internal arbiter is disabled, output is Req.
Indicates that the specified agent is granted access to the bus.
Used only when internal PCI arbiter enabled.
Used as a chip select during configuration read and write
transactions.
Level sensitive PCI interrupt.
Capable of 66MHz operation.
Even parity across PCIAD00:31 and PCIC0:3/BE0:3 buses.
ndicates the target agent’s ability to complete the current data
DD
or 8.2kΩ for PCI to OV
Description
.
DD
DD
) or pull-down (recommended value is 1kΩ to
or equivalent.
Preliminary Data Sheet
DD
Revision 1.19 – June 17, 2009
or equivalent.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
3.3V PCI
Type
AMCC Proprietary
Notes
1
4
4
4
4
4
4
4
2
2
5
5