PPC460EX-SUB800N AMCC, PPC460EX-SUB800N Datasheet - Page 85
PPC460EX-SUB800N
Manufacturer Part Number
PPC460EX-SUB800N
Description
Manufacturer
AMCC
Datasheet
1.PPC460EX-SUB800N.pdf
(106 pages)
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Revision 1.19 – June 17, 2009
Table 20. Peripheral Interface Clock Timings (Part 2 of 2)
AMCC Proprietary
TmrClk frequency
TmrClk period
TmrClk high time
TmrClk low time
TrcClk frequency
UARTSerClk frequency
UARTSerClk period
UARTSerClk high time
UARTSerClk low time
USB2DClk frequency
USB2DClk period
USB2DClk high time
USB2DClk low time
USB2HClk frequency
USB2HClk period
USB2HClk high time
USB2HClk low time
USB2HClk48 frequency
USB2HClk48 period
USB2HClk48 high time
USB2HClk48 low time
Notes:
Preliminary Data Sheet
1. T
2. An internal PLL improves this duty cycle to a worst case of 48% minimum, 52% maximum.
3. TrcClk is 1/4 CPU Clk. The maximum TrcClk supported by most instruction trace probes is 200MHz.
4. The rise time for GMCRefClk is measured between 0.7V and 1.7V.
page 82). The maximum OPB clock frequency is 100 MHz.
OPB
is the period in ns of the OPB clock. The minimum OPB clock frequency is Ethernet application dependant (see Table 19 on
Parameter
40% of nominal period
40% of nominal period
40% of nominal period
40% of nominal period
40% of nominal period
40% of nominal period
40% of nominal period
40% of nominal period
2T
Minimum
T
T
OPB
OPB
OPB
16.66
16.66
460EX – PPC460EX Embedded Processor
20.8
100
10
60
60
48
–
–
1
1
1
+ 1
+ 1
+ 2
60% of nominal period
60% of nominal period
60% of nominal period
60% of nominal period
60% of nominal period
60% of nominal period
60% of nominal period
60% of nominal period
1000/(2T
Maximum
16.66
16.66
20.8
100
300
OPB
60
60
48
–
–
–
–
1
+ 2ns)
Units
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
3
1
1
1
1
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