DSPB56366AG120 Freescale Semiconductor, DSPB56366AG120 Datasheet - Page 14

• Manufacturer Part Number: DSPB56366AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56366AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (240 kB)
• On-chip Ram: 69kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2-10
Signal Name
HWR/
PB10
HRW
HRD/
PB11
HDS/
HWR
PB12
HRD
HDS
HCS
HA9
HA2
Input, Output, or
Input, Output, or
Input, output, or
Disconnected
Disconnected
disconnected
Type
Input
Input
Input
Input
Input
Input
Input
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
State during
Reset
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Table 2-9 Host Interface (continued)
DSP56366 Technical Data, Rev. 3.1
Host Address Input 2—When the HDI08 is programmed to interface a
non-multiplexed host bus and the HI function is selected, this signal is line 2
of the host address (HA2) input bus.
Host Address 9—When HDI08 is programmed to interface a multiplexed
host bus and the HI function is selected, this signal is line 9 of the host
address (HA9) input bus.
Port B 10—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Host Read/Write—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
Host Read/Write (HRW) input.
Host Read Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host read data strobe (HRD) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HRD) after reset.
Port B 11—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Host Data Strobe—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
host data strobe (HDS) Schmitt-trigger input. The polarity of the data strobe
is programmable, but is configured as active-low (HDS) following reset.
Host Write Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host write data strobe (HWR) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HWR) following
reset.
Port B 12—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Host Chip Select—When HDI08 is programmed to interface a
nonmultiplexed host bus and the HI function is selected, this signal is the
host chip select (HCS) input. The polarity of the chip select is
programmable, but is configured active-low (HCS) after reset.
Signal Description
Freescale Semiconductor