DSPB56366AG120 Freescale Semiconductor, DSPB56366AG120 Datasheet - Page 2

• Manufacturer Part Number: DSPB56366AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56366AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (240 kB)
• On-chip Ram: 69kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Overview
1-2
This data sheet uses the following conventions:
Note: *Values for V
“deasserted”
Examples:
OVERBAR
“asserted”
TRIPLE
TIMER
1
GENERATOR
INTERNAL
CLOCK
SWITCH
(SPDIF Tx.)
SIX CHANNELS
PINIT/NMI
DATA
PLL
GENERATION
BUS
INTER-
DMA UNIT
FACE
IL
ADDRESS
DAX
RESET
, V
EXTAL
Used to indicate a signal that is active when pulled low (For example, the RESET pin is active
when low.)
Means that a high true (active high) signal is high or that a low true (active low) signal is low
Means that a high true (active high) signal is low or that a low true (active low) signal is high
UNIT
OL
2
Signal/Symbol
, V
IH
INTER-
HOST
CONTROLLER
FACE
INTERRUPT
, and V
PIN
PIN
PIN
PIN
PROGRAM
16
Figure 1-1 DSP56366 Block Diagram
OH
DSP56366 Technical Data, Rev. 3.1
INTER-
FACE
ESAI
EXPANSION AREA
ESAI_1
8
are defined by individual product specifications.
CONTROLLER
DSP56300
PROGRAM
MODD/IRQD
MODA/IRQA
MODB/IRQB
MODC/IRQC
DECODE
Data Sheet Conventions
PERIPHERAL
24-BIT
4
Core
6
Logic State
INTER-
FACE
SHI
False
False
True
True
GENERATOR
5
PROGRAM
ADDRESS
PROGRAM ROM
Bootstrap ROM
RAM/INSTR.
PROGRAM
40K x 24
192 x 24
CACHE
3K x 24
MEMORY EXPANSION AREA
DDB
YDB
XDB
PDB
GDB
24X24 + 56 -> 56-BIT MAC
DAB
YAB
XAB
PAB
BARREL SHIFTER
ACCUMULATORS
Signal State
Deasserted
Deasserted
Asserted
Asserted
X MEMORY
TWO 56-BIT
DATA ALU
13K X 24
32K x 24
ROM
RAM
24 BITS BUS
Y MEMORY
7K X 24
8K x 24
RAM
ROM
INTERFACE
SRAM BUS
EXTERNAL
ADDRESS
EXTERNAL
DATA BUS
MNGMNT
I - CACHE
Freescale Semiconductor
SWITCH
DRAM &
POWER
SWITCH
OnCE™
JTAG
BUS
&
V
V
Voltage*
V
V
IH
IH
IL
IL
/ V
/ V
/ V
/ V
OL
OH
OH
OL
CONTROL
ADDRESS
DATA
4
18
10
24