EP1K10TC100-3 Altera, EP1K10TC100-3 Datasheet - Page 34

IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part Number
EP1K10TC100-3
Description
IC ACEX 1K FPGA 10K 100-TQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
66
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1027
ACEX 1K Programmable Logic Device Family Data Sheet
34
Column-to-IOE Connections
When an IOE is used as an input, it can drive up to two separate column
channels. When an IOE is used as an output, the signal is driven by a
multiplexer that selects a signal from the column channels. Two IOEs
connect to each side of the column channels. Each IOE can be driven by
column channels via a multiplexer. The set of column channels is different
for each IOE (see
Figure 17. ACEX 1K Column-to-IOE Connections
Note:
(1)
Table 9
EP1K10
EP1K30
EP1K50
EP1K100
Table 9. ACEX 1K Column-to-IOE Interconnect Resources
The values for m and n are shown in
Device
lists the ACEX 1K column-to-IOE interconnect resources.
Column
Interconnect
Figure
Channels per Column (n) Column Channels per Pin (m)
n
17).
n
n
Each IOE can drive two
column channels.
m
m
24
24
24
24
Table
Each IOE is driven by
a m-to-1 multiplexer
9.
Note (1)
IOE1
IOE1
Altera Corporation
16
16
16
16

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