EP1K10TC100-3 Altera, EP1K10TC100-3 Datasheet - Page 38

IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part Number
EP1K10TC100-3
Description
IC ACEX 1K FPGA 10K 100-TQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
66
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1027
ACEX 1K Programmable Logic Device Family Data Sheet
38
t
t
t
f
f
f
t
t
t
t
R
F
INDUTY
CLK1
CLK2
CLKDEV
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 11. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices
Symbol
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost clock
multiplication factor equals 1)
Input clock frequency (ClockBoost clock
multiplication factor equals 2)
Input deviation from user specification in the
Altera software
Input clock stability (measured between
adjacent clocks)
Time required for ClockLock or ClockBoost
to acquire lock
Jitter on ClockLock or ClockBoost-
generated clock
Duty cycle for ClockLock or ClockBoost-
generated clock
(3)
(1)
Parameter
(4)
Tables 11
for -1 and -2 speed-grade devices, respectively.
and
12
summarize the ClockLock and ClockBoost parameters
t
t
INCLKSTB
INCLKSTB
Condition
<100
< 50
Min
40
25
16
40
Typ
50
Altera Corporation
250
200
25,000
Max
180
100
(2)
60
90
10
60
5
5
(4)
(4)
PPM
MHz
MHz
Unit
ns
ns
ps
ps
ps
%
%
s

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