EP1K10TC100-3 Altera, EP1K10TC100-3 Datasheet - Page 44

IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part Number
EP1K10TC100-3
Description
IC ACEX 1K FPGA 10K 100-TQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
66
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1027

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1K10TC100-3
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1K10TC100-3
Manufacturer:
ALTERA
0
Part Number:
EP1K10TC100-3
Manufacturer:
ALTERA
Quantity:
106
Price:
1.00 USD
Part Number:
EP1K10TC100-3N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1K10TC100-3N
Manufacturer:
ALTERA
0
ACEX 1K Programmable Logic Device Family Data Sheet
Figure 20. ACEX 1K JTAG Waveforms
44
Captured
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
Table 17
t
t
t
t
t
t
t
t
t
t
t
t
t
t
JCH
Symbol
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 17. ACEX 1K JTAG Timing Parameters & Values
t
t
JPZX
JSZX
t
JCP
t
JSSU
shows the timing parameters and values for ACEX 1K devices.
t
JCL
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
t
JSH
t
t
JPCO
JSCO
t
JPSU
Parameter
t
t
JSXZ
JPH
t
JPXZ
Altera Corporation
Min
100
20
45
50
50
20
45
Max
25
25
25
35
35
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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