EP1K10TC100-3 Altera, EP1K10TC100-3 Datasheet - Page 65

IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part Number
EP1K10TC100-3
Description
IC ACEX 1K FPGA 10K 100-TQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
66
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1027
Altera Corporation
Notes to tables:
(1)
(2)
(3)
(4)
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LUT
CLUT
RLUT
PACKED
EN
CICO
CGEN
CGENR
CASC
C
CO
Table 36. EP1K10 External Bidirectional Timing Parameters
INSUBIDIR
INHBIDIR
OUTCOBIDIR
XZBIDIR
ZXBIDIR
INSUBIDIR
INHBIDIR
OUTCOBIDIR
XZBIDIR
ZXBIDIR
Table 37. EP1K30 Device LE Timing Microparameters (Part 1 of 2)
All timing parameters are described in
This parameter is measured without the use of the ClockLock or ClockBoost circuits.
These parameters are specified by characterization.
This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Symbol
Symbol
(4)
(2)
(2)
(4)
(2)
(4)
(2)
(4)
(2)
(4)
Min
Min
2.2
0.0
2.0
3.1
0.0
0.5
Tables 37
parameters.
-1
-1
Max
Max
6.6
8.8
8.8
5.1
7.3
7.3
0.7
0.5
0.6
0.3
0.6
0.1
0.4
0.1
0.6
0.0
0.3
through
Tables 22
Min
Min
2.3
0.0
2.0
3.3
0.0
0.5
Speed Grade
Speed Grade
43
ACEX 1K Programmable Logic Device Family Data Sheet
through
show EP1K30 device internal and external timing
-2
-2
29
Max
11.2
11.2
Max
7.8
6.4
9.2
9.2
0.8
0.6
0.7
0.4
0.8
0.1
0.5
0.1
0.8
0.0
0.4
in this data sheet.
Notes
Min
Min
(1),
3.2
0.0
2.0
Note (1)
(3)
-3
-3
Max
14.0
14.0
Max
9.6
1.1
0.8
1.0
0.5
1.0
0.2
0.7
0.2
1.0
0.0
0.5
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
65
13

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