EP1K10QC208-3 Altera, EP1K10QC208-3 Datasheet - Page 54

• Manufacturer Part Number: EP1K10QC208-3
• Description: IC ACEX 1K FPGA 10K 208-PQFP
• Manufacturer: Altera
• Series: ACEX-1K®r

Specifications of EP1K10QC208-3

• Number Of Logic Elements/cells: 576
• Number Of Labs/clbs: 72
• Total Ram Bits: 12288
• Number Of I /o: 120
• Number Of Gates: 56000
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-MQFP, 208-PQFP
• No. Of I/o's: 120
• Operating Temperature Range: 0°C To +70°C
• Logic Case Style: QFP
• No. Of Pins: 208
• Peak Reflow Compatible (260 C): No
• No. Of Macrocells: 576
• Rohs Compliant: No
• Clock Management: PLL
• Leaded Process Compatible: No
• No. Of Gates: 10000
• No. Of Logic Blocks: 72
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-1090

ACEX 1K Programmable Logic Device Family Data Sheet
Figure 30. EAB Synchronous Timing Waveforms
54
t
t
t
t
t
t
t
t
LUT
CLUT
RLUT
PACKED
EN
CICO
CGEN
CGENR
Table 22. LE Timing Microparameters (Part 1 of 2)
EAB Synchronous Read
EAB Synchronous Write (EAB Output Registers Used)
Data-Out
Data-Out
Symbol
Address
Address
Data-In
CLK
CLK
WE
WE
a0
t
EABDATASU
a0
LUT delay for data-in
LUT delay for carry-in
LUT delay for LE register feedback
Data-in to packed register delay
LE register enable delay
Carry-in to carry-out delay
Data-in to carry-out delay
LE register feedback to carry-out delay
t
EABWESU
din1
a1
Tables 22
parameters.
dout0
a1
t
through
EABDATAH
t
EABDATASU
dout1
Parameter
din2
26
a2
describe the ACEX 1K device internal timing
t
t
EABDATAH
t
EABDATACO
EABWCREG
Note (1)
din1
din3
t
a3
EABWEH
t
a2
EABDATACO
t
EABRCREG
din2
d1
Altera Corporation
din3
a2
Conditions
a3
d2
din2