EP4CE115F29I8LN Altera, EP4CE115F29I8LN Datasheet - Page 413
![IC CYCLONE IV FPGA 115K 780-FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP4CE115F29I8LN
Manufacturer Part Number
EP4CE115F29I8LN
Description
IC CYCLONE IV FPGA 115K 780-FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE115F29I8LN
Number Of Logic Elements/cells
114480
Number Of Labs/clbs
7155
Total Ram Bits
3888000
Number Of I /o
528
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Table 3–5. rx_dataoutfull[31..0] FPGA Fabric-Transceiver Channel Interface Signal Descriptions (Part 2 of 3)
© December 2010 Altera Corporation
FPGA Fabric-Transceiver
Channel Interface Description
16-bit FPGA fabric-Transceiver
Channel Interface with PCS-PMA set
to 8/10 bits
Receive Signal Description (Based on Cyclone IV GX Supported FPGA
Fabric-Transceiver Channel Interface Widths)
Two 8-bit unencoded Data (rx_dataout)
rx_dataoutfull[7:0] - rx_dataout (LSByte) and
rx_dataoutfull[23:16]- rx_dataout (MSByte)
The following signals are used in 16-bit 8B/10B modes:
Two Control Bits
rx_dataoutfull[8] - rx_ctrldetect (LSB) and
rx_dataoutfull[24]- rx_ctrldetect (MSB)
Two Receiver Error Detect Bits
rx_dataoutfull[9] - rx_errdetect (LSB) and
rx_dataoutfull[25]- rx_errdetect (MSB)
Two Receiver Sync Status Bits
rx_dataoutfull [10] - rx_syncstatus (LSB) and
rx_dataoutfull[26] - rx_syncstatus (MSB)
Two Receiver Disparity Error Bits
rx_dataoutfull [11] - rx_disperr (LSB) and
rx_dataoutfull[27] - rx_disperr (MSB)
Two Receiver Pattern Detect Bits
rx_dataoutfull[12] - rx_patterndetect (LSB) and
rx_dataoutfull[28]- rx_patterndetect (MSB)
rx_dataoutfull[13] and rx_dataoutfull[29]: Rate Match FIFO deletion
status indicator (rx_rmfifodatadeleted) in non-PCI Express (PIPE) functional
modes
rx_dataoutfull[14] and rx_dataoutfull[30]: Rate Match FIFO insertion
status indicator (rx_rmfifodatainserted) in non-PCI Express (PIPE) functional
modes
Two 2-bit PCI Express (PIPE) Functional Mode Status Bits
rx_dataoutfull[14:13] - rx_pipestatus (LSB) and
rx_dataoutfull[30:29] - rx_pipestatus (MSB)
rx_dataoutfull[15] and rx_dataoutfull[31]: 8B/10B running disparity
indicator (rx_runningdisp)
Cyclone IV Device Handbook, Volume 2
3–23
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