EP4CE115F29I8LN Altera, EP4CE115F29I8LN Datasheet - Page 91
![IC CYCLONE IV FPGA 115K 780-FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP4CE115F29I8LN
Manufacturer Part Number
EP4CE115F29I8LN
Description
IC CYCLONE IV FPGA 115K 780-FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE115F29I8LN
Number Of Logic Elements/cells
114480
Number Of Labs/clbs
7155
Total Ram Bits
3888000
Number Of I /o
528
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 5: Clock Networks and PLLs in Cyclone IV Devices
Hardware Features
© December 2010 Altera Corporation
There are two ways to use the clock switchover feature:
■
■
Figure 5–18
automatic loss of clock detection. Here, the inclk0 signal remains low. After the
inclk0 signal remains low for approximately two clock cycles, the clock-sense
circuitry drives the clkbad0 signal high. Also, because the reference clock signal is
not toggling, the switchover state machine controls the multiplexer through the
clksw signal to switch to inclk1.
Figure 5–18. Automatic Switchover Upon Clock Loss Detection
Note to
(1) Switchover is enabled on the falling edge of inclk0 or inclk1, depending on which clock is available. In this
Use the switchover circuitry for switching from inclk0 to inclk1 running at the
same frequency. For example, in applications that require a redundant clock with
the same frequency as the reference clock, the switchover state machine generates
a signal that controls the multiplexer select input shown in
case, inclk1 becomes the reference clock for the PLL. This automatic switchover
can switch back and forth between the inclk0 and inclk1 clocks any number of
times, when one of the two clocks fails and the other clock is available.
Use the clkswitch input for user- or system-controlled switch conditions. This is
possible for same-frequency switchover or to switch between inputs of different
frequencies. For example, if inclk0 is 66 MHz and inclk1 is 200 MHz, you must
control the switchover because the automatic clock-sense circuitry cannot monitor
primary and secondary clock frequencies with a frequency difference of more than
20%. This feature is useful when clock sources can originate from multiple cards
on the backplane, requiring a system-controlled switchover between frequencies
of operation. Choose the secondary clock frequency so the VCO operates in the
recommended frequency range. Also, set the M, N, and C counters accordingly to
keep the VCO operating frequency in the recommended range.
figure, switchover is enabled on the falling edge of inclk1.
Figure
5–18:
shows a waveform example of the switchover feature when using
activeclock
clkbad0
clkbad1
muxout
inclk0
inclk1
(1)
(Note 1)
Cyclone IV Device Handbook, Volume 1
Figure
5–17. In this
5–29
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