EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 210

• Manufacturer Part Number: EP2AGX190FF35C6N
• Description: IC ARRIA II GX 190K 1152FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190FF35C6N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 612
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 612
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

7–14
Figure 7–11. Number of DQ/DQS Groups per Bank in EP2AGZ300 and EP2AGZ350 Devices in the 780-Pin FineLine BGA
Package
Notes to
(1) These numbers are preliminary until the devices are available.
(2) EP2AGZ300 and EP2AGZ350 devices do not support ×32/×36 mode. To interface with a ×36 QDR II+/QDR II SRAM device, refer to
Arria II Device Handbook Volume 1: Device Interfaces and Integration
×16/×18 DQ/DQS Groups for ×36 QDR II+/QDR II SRAM Interface” on page
Figure
(Note
7–11:
1),
(2)
Figure 7–11
EP2AGZ300 and EP2AGZ350 devices in the 780-pin FineLine BGA package.
DLL1
DLL0
shows the number of DQ/DQS groups per bank in Arria II GZ
40 User I/Os
40 User I/Os 32 User I/Os 32 User I/Os
I/O Bank 8A
×16/×18=1
I/O Bank 3A
×16/×18=1
×8/×9=3
×8/×9=3
×4=6
×4=6
EP2AGZ300 and EP2AGZ350 Devices
in the 780-Pin FineLine BGA
32 User I/Os
I/O Bank 8C
I/O Bank 3C
×16/×18=0
×16/×18=0
×8/×9=1
×8/×9=1
×4=3
×4=3
I/O Bank 4C
32 User I/Os
I/O Bank 7C
×16/×18=0
×16/×18=0
×8/×9=1
×8/×9=1
×4=3
×4=3
7–21.
Chapter 7: External Memory Interfaces in Arria II Devices
40 User I/Os
40 User I/Os
I/O Bank 4A
×16/×18=1
I/O Bank 7A
×16/×18=1
×8/×9=3
×8/×9=3
×4=6
×4=6
Memory Interfaces Pin Support for Arria II Devices
DLL3
DLL2
December 2010 Altera Corporation
“Combining