XCV50E-6PQ240I Xilinx Inc, XCV50E-6PQ240I Datasheet - Page 155

• Manufacturer Part Number: XCV50E-6PQ240I
• Description: IC FPGA 1.8V I-TEMP 240-PQFP
• Manufacturer: Xilinx Inc
• Series: Virtex™-Er

Specifications of XCV50E-6PQ240I

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 65536
• Number Of I /o: 158
• Number Of Gates: 71693
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 240-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

FG676 Differential Pin Pairs
Virtex-E devices have differential pin pairs that can also pro-
vide other functions when not used as a differential pair. A √
in the AO column indicates that the pin pair can be used as
an asynchronous output for all devices provided in this
package. Pairs with a note number in the AO column are
device dependent. They can have asynchronous outputs if
the pin pair are in the same CLB row and column in the
device. Numbers in this column refer to footnotes that indi-
cate which devices have pin pairs than can be asynchro-
nous outputs. The Other Functions column indicates
alternative function(s) not available when the pair is used as
a differential pair or differential clock.
Table 21: FG676 Differential Pin Pair Summary
XCV400E, XCV600E
DS022-4 (v2.5) March 14, 2003
Production Product Specification
Pair
10
11
12
13
14
15
16
17
3
2
1
0
0
1
2
3
4
5
6
7
8
9
Total Pairs: 183, Asynchronous Output Pairs: 97
Ban
k
0
1
5
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
AB13
AA14
Global Differential Clock
C13
G10
D10
D11
E13
F10
E10
F11
E11
F12
Pin
G9
C5
E7
D7
C7
E9
D9
F7
F8
F9
P
IOLVDS
AF13
AC14
G11
G12
B13
B10
C10
C11
F14
Pin
C4
G8
D6
D8
C9
A4
B5
E8
A5
B7
A7
B8
A8
N
AO
NA
NA
NA
NA
NA
NA
NA
NA
NA
1
√
√
√
√
1
1
√
1
√
√
√
√
IO_DLL_L115N
IO_DLL_L115P
IO_DLL_L21N
IO_DLL_L21P
Functions
Other
VREF
VREF
VREF
VREF
VREF
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
1-800-255-7778
Table 21: FG676 Differential Pin Pair Summary
XCV400E, XCV600E
Pair
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Virtex™-E 1.8 V Field Programmable Gate Arrays
Ban
k
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
C12
H13
H14
C15
D15
D16
D17
C18
G16
G17
C20
D20
C21
D21
G21
H23
E12
F14
F13
A14
F15
A17
E17
B19
E18
B20
E19
E20
E21
E23
E24
F24
E25
F23
Pin
P
G14
G15
G19
G18
G22
G23
A11
D12
A12
B13
E14
D14
C14
E15
C16
E16
C17
A18
C19
D18
D19
A21
B22
A23
C22
H20
H21
F16
F17
F18
F19
F22
F20
Pin
J20
N
AO
NA
NA
√
1
1
1
1
√
√
√
√
√
1
√
√
√
1
1
√
√
√
√
√
√
2
√
√
√
2
1
1
√
√
-
IO_LVDS_DLL
Functions
DIN, D0
Other
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
Module 4 of 4
CS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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