XCV50E-6PQ240I Xilinx Inc, XCV50E-6PQ240I Datasheet - Page 68
![no-image](/images/no-image-200.jpg)
XCV50E-6PQ240I
Manufacturer Part Number
XCV50E-6PQ240I
Description
IC FPGA 1.8V I-TEMP 240-PQFP
Manufacturer
Xilinx Inc
Series
Virtex™-Er
Datasheet
1.XCV50E-6PQ240I.pdf
(233 pages)
Specifications of XCV50E-6PQ240I
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
384
Total Ram Bits
65536
Number Of I /o
158
Number Of Gates
71693
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
240-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCV50E-6PQ240I
Manufacturer:
XilinxInc
Quantity:
3 000
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Virtex™-E 1.8 V Field Programmable Gate Arrays
IOB Input Switching Characteristics Standard Adjustments
Module 3 of 4
8
Notes:
1.
Data Input Delay Adjustments
Standard-specific data input delay
adjustments
Input timing i for LVTTL is measured at 1.4 V. For other I/O standards, see
Figure 1: Virtex-E Input/Output Block (IOB)
T
TCE
O
OCE
IQ
SR
CLK
ICE
I
Description
D
CE
D
CE
Q
SR
SR
SR
CE
Q
Q
D
Programmable
Delay
OBUFT
IBUF
Vref
T
T
T
T
T
ILVCMOS18
T
Symbol
ILVCMOS2
IGTLPLUS
T
T
T
Keeper
T
T
Weak
IPCI33_3
IPCI66_3
ILVPECL
T
T
T
ISSTL2
ISSTL3
ILVTTL
ILVDS
IHSTL
IAGP
IGTL
ICTT
ds022_02_091300
PAD
www.xilinx.com
1-800-255-7778
PCI, 33 MHz, 3.3 V
PCI, 66 MHz, 3.3 V
LVCMOS18
LVCMOS2
Standard
LVPECL
SSTL2
SSTL3
LVTTL
LVDS
GTL+
HSTL
AGP
GTL
CTT
Table
4.
–0.02
–0.05
–0.05
+0.10
+0.06
+0.02
–0.04
–0.02
+0.01
–0.03
0.12
0.00
0.00
Min
0.0
Speed Grade
+0.20
+0.15
+0.15
+0.08
–0.11
+0.14
+0.14
+0.04
+0.04
+0.04
+0.10
+0.04
0.0
0.0
-8
Production Product Specification
DS022-3 (v2.9.2) March 14, 2003
+0.20
+0.15
+0.15
+0.08
–0.11
+0.14
+0.14
+0.04
+0.04
+0.04
+0.10
+0.04
0.0
0.0
-7
(1)
+0.20
+0.15
+0.15
+0.08
+0.14
+0.14
+0.04
+0.04
+0.04
+0.10
+0.04
–0.11
0.0
0.0
-6
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
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