XCV50E-6PQ240I Xilinx Inc, XCV50E-6PQ240I Datasheet - Page 72

• Manufacturer Part Number: XCV50E-6PQ240I
• Description: IC FPGA 1.8V I-TEMP 240-PQFP
• Manufacturer: Xilinx Inc
• Series: Virtex™-Er

Specifications of XCV50E-6PQ240I

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 384
• Total Ram Bits: 65536
• Number Of I /o: 158
• Number Of Gates: 71693
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 240-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex™-E 1.8 V Field Programmable Gate Arrays
Clock Distribution Switching Characteristics
I/O Standard Global Clock Input Adjustments
Module 3 of 4
12
Notes:
1.
GCLK IOB and Buffer
Global Clock PAD to output.
Global Clock Buffer I input to O output
Data Input Delay Adjustments
Standard-specific global clock
input delay adjustments
Input timing for GPLVTTL is measured at 1.4 V. For other I/O standards, see
Description
Description
T
T
T
T
GPLVCMOS18
Symbol
GPLVCMOS2
T
T
T
T
T
T
GPPCI33_3
GPPCI66_3
T
T
T
T
GLVPECL
GPSSTL2
GPSSTL3
GPLVTTL
GPGTLP
GPHSTL
GLVDS
GPGTL
GPCTT
GPAGP
(1)
PCI, 33 MHz, 3.3 V
PCI, 66 MHz, 3.3 V
www.xilinx.com
1-800-255-7778
LVCMOS18
Symbol
LVCMOS2
Standard
T
LVPECL
T
SSTL2
SSTL3
GPIO
LVTTL
LVDS
GTL+
HSTL
GIO
AGP
GTL
CTT
0.38
0.11
Min
Table
–0.02
–0.05
–0.05
0.12
0.23
0.23
0.20
0.20
0.18
0.21
0.18
0.22
0.21
Min
0.0
4.
0.20
Speed Grade
0.7
-8
–0.11
0.37
0.33
0.20
0.38
0.38
0.08
0.37
0.27
0.27
0.27
0.27
Speed Grade
0.0
0.0
-8
Production Product Specification
0.45
0.7
-7
DS022-3 (v2.9.2) March 14, 2003
–0.11
0.20
0.38
0.38
0.08
0.37
0.37
0.27
0.27
0.27
0.33
0.27
0.0
0.0
-7
0.50
0.7
-6
–0.11
0.20
0.38
0.37
0.37
0.33
0.27
0.38
0.08
0.27
0.27
0.27
0.0
0.0
-6
ns, max
ns, max
Units
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
Units
R