EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 172

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
Note:
Table 90. I
If an illegal condition occurs on the I
00h
IFLG bit cleared. The I
on the I
Code
40h
48h
50h
58h
60h
68h
70h
78h
80h
88h
90h
98h
A0h
A8h
B0h
B8h
C0h
C8h
D0h
D8h
F8h
). To recover from this state, the STP bit in the I2C_CTL register must be set and the
The STP and STA bits may be set to 1 at the same time to recover from the bus
error. The I
2
C bus.
2
Status
Address and Read bit transmitted, ACK received
Address and Read bit transmitted, ACK not received
Data byte received in MASTER mode, ACK transmitted
Data byte received in MASTER mode, NACK transmitted
Slave address and Write bit received, ACK transmitted
Arbitration lost in address as master, slave address and Write bit received,
ACK transmitted
General Call address received, ACK transmitted
Arbitration lost in address as master, General Call address received, ACK
transmitted
Data byte received after slave address received, ACK transmitted
Data byte received after slave address received, NACK transmitted
Data byte received after General Call received, ACK transmitted
Data byte received after General Call received, NACK transmitted
STOP or repeated START condition received in SLAVE mode
Slave address and Read bit received, ACK transmitted
Arbitration lost in address as master, slave address and Read bit received,
ACK transmitted
Data byte transmitted in SLAVE mode, ACK received
Data byte transmitted in SLAVE mode, ACK not received
Last byte transmitted in SLAVE mode, ACK received
Second Address byte and Write bit transmitted, ACK received
Second Address byte and Write bit transmitted, ACK not received
No relevant status information, IFLG = 0
C Status Codes (Continued)
2
C then sends a START condition.
2
C then returns to the idle state. No STOP condition is transmitted
P R E L I M I N A R Y
2
C bus, the bus error state is entered (status code
Product Specification
I2C Serial I/O Interface
eZ80F92/eZ80F93
160