EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 230

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 138. Op Code Map—Second Op Code After 0DDh
PS015308-0404
Legend
of Second
First Operand
Op Code
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
Nibble
Upper
Notes:
(IX+d),B
IXH,B
LD
LD
0
Lower Nibble of 2nd Op Code
(IX+d),C
(IX+d)
n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
LD IY,
IXH,C
Mmn
POP
F
LD
LD
LD
IX,
IX
1
SP,IX
LD
9
(IX+d),D
(Mmn),
IXH,D
LD
LD
LD
IX
2
Second Operand
(IX+d),E
Mnemonic
(SP),IX
IXH,E
INC
LD
LD
EX
IX
3
(IX+d),H
IXH,IXH
(IX+d)
B,IXH
D,IXH
A,IXH
A,IXH
A,IXH
A,IXH
ADD
SUB
AND
INC
INC
IXH
OR
LD
LD
LD
LD
4
(IX+d),L
IXH,IXL
(IX+d)
PUSH
B,IXL
D,IXL
A,IXL
A,IXL
A,IXL
A,IXL
DEC
DEC
ADD
SUB
AND
IXH
OR
LD
LD
LD
LD
IX
5
ADD A,
SUB A,
AND A,
LD (IX
P R E L I M I N A R Y
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
OR A,
(IX+d)
IXH,n
LD B,
LD D,
LD H,
+d),n
LD
6
Lower Nibble (Hex)
(IX+d),A
LD BC,
LD DE,
LD HL,
(IX+d)
(IX+d)
(IX+d)
LD IX,
(IX+d)
IXH,A
LD
LD
7
IXL,B
LD
8
IX,BC
IX,DE
IX,SP
IXL,C
SP,IX
IX,IX
ADD
ADD
ADD
ADD
(IX)
LD
JP
LD
9
(Mmn)
IXL,D
LD
IX,
LD
A
Map—
and dd
Fourth
0DDh,
0CBh,
IXL,E
Code
DEC
After
Byte
LD
Op
IX
B
Product Specification
IXL,IXH
C,IXH
E,IXH
A,IXH
A,IXH
A,IXH
A,IXH
A,IXH
ADC
XOR
SBC
INC
IXL
LD
LD
LD
LD
CP
C
eZ80F92/eZ80F93
LD A,IXL
IXL,IXL
C,IXL
E,IXL
A,IXL
A,IXL
A,IXL
A,IXL
DEC
ADC
XOR
SBC
IXL
LD
LD
LD
CP
D
Op-Code Map
ADC A,
XOR A,
SBC A,
(IX+d),
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
LD C,
LD E,
LD A,
CP A,
IXL,n
LD L,
LD
LD
IY
E
(IX+d),
(IX+d),
(IX+d),
(IX+d),
IXL,A
LD
BC
LD
DE
LD
HL
LD
LD
IX
F
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